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2013

Hardware Support for Accurate Per-task Energy Metering in Multicore Systems

ACM Trans. Archit. Code Optim.

Q. Liu, M. Moreto, V. Jiménez, J. Abella, F. Cazorla, and M. Valero
Upper-bounding Program Execution Time with Extreme Value Theory.

13th International Workshop on Worst-Case Execution Time Analysis

F. Cazorla, T. Vardanega, E. Quinones, and J. Abella
The Next Convergence: High-performance and Mission-critical Markets

Workshop on High-performance and Real-time Embedded Systems (HiRES)

S. Girbal, M. Moreto, A. Grasset, J. Abella, E. Quinones, F. Cazorla, and S. Yehia
Implicit-Storing and Redundant-Encoding-of-Attribute Information in Error-Correction-Codes

46th IEEE/ACM International Symposium on Microarchitecture (MICRO)

Y. Sazeides, E. Ozer, D. Kershaw, P. Nikolaou, M. Kleanthous, and J. Abella
Multi-Level Unified Caches for Probabilistically Time Analysable Real-Time Systems

IEEE Real-Time Systems Symposium (RTSS) 2013

L. Kosmidis, J. Abella, E. Quinones, and F. Cazorla
On-Chip Ring Network Designs for Hard-Real Time Systems

21st International Conference on Real-Time Networks and Systems

M. Panic, G. Rodríguez, E. Quinones, J. Abella, and F. Cazorla
parMERASA Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability

Euromicro Conference on Digital System Design, DSD 2013

T. Ungerer, C. Bradatsch, M. Gerdes, F. Kluge, R. Jahr, J. Mische, J. Fernandes, P. Zaykov, P. Zlatko, B. Boddeker, S. Kehr, H. Regler, A. Hugl, C. Rochange, H. Ozaktas, H. Casse, B. Armelle, P. Sainrat, N. Lay, I. Broster, D. George, M. Panic, E. Quinones, F. Cazorla, J. Abella, S. Uhrig, M. Rohde, and A. Pyka
Supporting Industrial Use of Probabilistic Timing Analysis with Explicit Argumentation

11th IEEE International Conference on Industrial Informatics (INDIN)

Z. Stephenson, J. Abella, and T. Vardanega
Measurement-Based Probabilistic Timing Analysis to Buffer Resources

13th International Workshop on Worst-Case Execution Time Analysis (WCET)

L. Kosmidis, T. Vardanega, E. Quinones, J. Abella, and F. Cazorla
Deconstructing Bus Access Control Policies for Real-Time Multicores

8th IEEE International Symposium on Industrial Embedded Systems (SIES)

J. Jalle, J. Abella, E. Quinones, L. Fossati, M. Zulianello, and F. Cazorla

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