PATC Course: Programming ARM based prototypes

PRACE Trainings

Data: 16/May/2014

Place:

The course will take place in
Barcelona Supercomputing Centre,
within the UPC Campus Nord premises.

Room VS219, Vertex Building (green on the map)
S indicates that the room is 2 floors below the entrance level.

Target group: Standard HPC users, some knowledge of multicore and GPU-accelerated systems is desirable, but not required. Level: ITERMEDIATE: for participants with some theoretical and practical knowledge (All courses are designed for specialists with at least 1st cycle degree)

Cost: There is no registration fee. The attendees would need to cover the expenses for travel, accommodation and meals.

Primary tabs

Objectives

Get a comprehensive view of the architecture of the ARM-based prototypes at BSC (ARM multicore cluster and ARM+CUDA GPU cluster) and how to program these machines efficiently.

Learning Outcomes:
Understand how ARM multicore and ARM+GPU clusters work. Work with some example codes, compiling, debugging and executing trough system queues.
Get a global view of the machines with their specific configuration (Operating system, batch system, debuggers, compilers, how to access to the machines, how to use the resources, etc)

Requirements

The trainees are expected to come with their own laptop with a SSH client.

The registration for this course opened on 1st of October 2013.


Recommended Accomodation:


Please follow the link for map of some local hotels.


Contact Us:


CONTACT US for further details about MSc, PhD, Post Doc studies, exchanges and collaboration in education and training with BSC.

For further details about Postgraduate Studies in UPC - Barcelona School of Informatics (FiB), visit the website.


Sponsors:


The PATC@BSC training events are funded by BSC and PRACE 3IP project.

If you want to learn more about PRACE Project, visit the website.

 

 

Materials

This is a short video of a lecture.