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We are particularly interested for this role in the strengths and lived experiences of women and underrepresented groups to help us avoid perpetuating biases and oversights in science and IT research. In instances of equal merit, the incorporation of the under-represented sex will be favoured.
We promote Equity, Diversity and Inclusion, fostering an environment where each and every one of us is appreciated for who we are, regardless of our differences.
If you consider that you do not meet all the requirements, we encourage you to continue applying for the job offer. We value diversity of experiences and skills, and you could bring unique perspectives to our team.
The team's activities include:
* Deploying and maintaining a hardware/software infrastructure of RISC-V prototypes, including commercial and FPGA-based platforms, which serve as compute nodes in an HPC data center.
* Analyzing and optimizing the performance of benchmarks, mini-apps, and libraries on emerging architectures, such as RISC-V vector architectures.
* Providing feedback to RTL designers and system software developers, including the compiler team, to facilitate the adoption of novel architectures.
* Supporting scientific communities and research projects in testing new architectures, analyzing and optimizing their code performance, and benchmarking against state-of-the-art HPC systems.
The team is seeking a research engineer to analyze the performance of scientific applications on long-vector RISC-V systems.
- - Understand and modify scientific code developed by third parties.
- - Implement algorithms with high-level programming languages (e.g., FORTRAN, C or Python).
- - Understand advanced architecture features and relate them to high level programming languages as well as assembly code.
- - Integrate with the BSC tools and system software infrastructure.
- - Validate basic implementation comparing results with the reference version of the code under study.
- - Give support to team members and users of the RISC-V platforms involved in the project.
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Education
- On going higher degree studies in Computer Science, Electrical or Computer Engineering, Physics or Mathematics.
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Essential Knowledge and Professional Experience
- - Te position is for a junior profile (0-2 years of experience). Knowledge of parallel/cluster computation as well as basic computer architecture are required. Basic knowledge of hardware description languages (Verilog, SystemVerilog, VHDL) is desirable.
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Competences
- Capability of compiling and running parallel scientific codes
- Knowledge of high-level programming languages
- The position will be located at BSC within the Computer Sciences Department
- We offer a full-time contract (37.5h/week), a good working environment, a highly stimulating environment with state-of-the-art infrastructure, flexible working hours, extensive training plan, restaurant tickets, private health insurance, support to the relocation procedures
- Duration: Open-ended contract due to technical and scientific activities linked to the project and budget duration
- Holidays: 23 paid vacation days plus 24th and 31st of December per our collective agreement
- Salary: we offer a competitive salary commensurate with the qualifications and experience of the candidate and according to the cost of living in Barcelona
- Starting date: 01/04/2025
- A full CV in English including contact details
- A cover/motivation letter with a statement of interest in English, clearly specifying for which specific area and topics the applicant wishes to be considered. Additionally, two references for further contacts must be included. Applications without this document will not be considered.
Development of the recruitment process
The selection will be carried out through a competitive examination system ("Concurso-Oposición"). The recruitment process consists of two phases:
- Curriculum Analysis: Evaluation of previous experience and/or scientific history, degree, training, and other professional information relevant to the position. - 40 points
- Interview phase: The highest-rated candidates at the curriculum level will be invited to the interview phase, conducted by the corresponding department and Human Resources. In this phase, technical competencies, knowledge, skills, and professional experience related to the position, as well as the required personal competencies, will be evaluated. - 60 points. A minimum of 30 points out of 60 must be obtained to be eligible for the position.
The recruitment panel will be composed of at least three people, ensuring at least 25% representation of women.
In accordance with OTM-R principles, a gender-balanced recruitment panel is formed for each vacancy at the beginning of the process. After reviewing the content of the applications, the panel will begin the interviews, with at least one technical and one administrative interview. At a minimum, a personality questionnaire as well as a technical exercise will be conducted during the process.
The panel will make a final decision, and all individuals who participated in the interview phase will receive feedback with details on the acceptance or rejection of their profile.
At BSC, we seek continuous improvement in our recruitment processes. For any suggestions or comments/complaints about our recruitment processes, please contact recruitment [at] bsc [dot] es.
For more information, please follow this link.
BSC-CNS is an equal opportunity employer committed to diversity and inclusion. We are pleased to consider all qualified applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or any other basis protected by applicable state or local law.
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