SafeLS

Safety Supports RISC-V BSC Group: Computer Sciences Hardware

SafeLS (Safe Lockstep): The Safe Lockstep (SafeLS for short) unit is a RISC-V open-source lockstep core based on Frontgrade Gaisler AB's NOEL-V core for the space domain, as well as its integration in the SELENE SoC that provides a complete microcontroller synthesizable on FPGA successfully assessed against space, automotive, and railway safety-critical applications in the past.

Software Author: 
Marcel Sarraseca Julian, Sergi Alcaide Portet
License: 

GPL License (Version 3.0)

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GPL License (Version 3.0) (Latest Version)

Link below to download SafeLS

Release Notes