Eduard Ayguade Parra

2007

• Transactional Memory and OpenMP

  International Workshop on OpenMP (IWOMP-2007)

  M. Milovanovic, R. Ferrer, O. Unsal, A. Cristal, X. Martorell, E. Ayguade, J. Labarta, and M. Valero
• Transactional Memory: An Overview

  IEEE Micro

  T. Harris, A. Cristal, O. Unsal, E. Ayguade, F. Galiardi, B. Smith, and M. Valero
• CellSim: A Cell Processor Simulation Infrastructure

  2007 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-07)

  F. Cabarcas, A. Rico, D. Ródenas, X. Martorell, A. Ramirez, and E. Ayguade
• A Novel Asynchronous Software Cache Implementation for the Cell-BE Processor

  J. Balart, M. González, X. Martorell, E. Ayguade, Z. Sura, T. Chen, T. Zhang, K. O'Brien, and K. O'Brien
• An Experimental Evaluation of the New OpenMP Tasking Model

  E. Ayguade, A. Duran, J. Hoeflinger, F. Massaioli, and X. Teruel
• Support for OpenMP Tasks in Nanos v4

  X. Teruel, X. Martorell, A. Duran, R. Ferrer, and E. Ayguade
• A proposal for task parallelism in OpenMP

  E. Ayguade, N. Copty, A. Duran, J. Hoeflinger, Y. Lin, F. Massaioli, E. Su, P. Unnikrishnan, and G. Zhang
• CellSim: A Validated Modular Heterogeneous Multiprocessor Simulator

  XVIII Jornadas de Paralelismo de Zaragoza

  F. Cabarcas, A. Rico, D. Ródenas, X. Martorell, A. Ramirez, and E. Ayguade
• A Streaming Machine Description and Programming Model

  7th Intl. Workshop on Embedded Computer Systems: Architectures, MOdeling, and Simulation (SAMOS VII)

  P. Carpenter, D. Ródenas, X. Martorell, A. Ramirez, and E. Ayguade
• Implementation and Validation of a Cell Simulator using UNISIM

  3rd HiPEAC Industrial Workshop

  A. Rico, F. Cabarcas, D. Ródenas, X. Martorell, A. Ramirez, and E. Ayguade