Eduard Ayguade Parra

2008

• Scalability of Macroblock-level Parallelism for H.264 Decoding

  Advanced Computer Architecture and Compilation for Embedded Systems. ACACES 2008, Poster

  M. Álvarez, A. Ramirez, X. Martorell, E. Ayguade, and M. Valero
• Automatic Pre-Fetch and Modulo Scheduling Transformations for the Cell BE Architecture

  N. Vujic, M. González, X. Martorell, and E. Ayguade
• An Adaptive Cut-off for Task Parallelism

  A. Duran, J. Corbalán, and E. Ayguade
• Hybrid Access-Specific Software Cache Techniques for the Cell BE Architecture

  M. González, N. Vujic, X. Martorell, E. Ayguade, A. E. Eichenberger, T. Chen, Z. Sura, T. Zhang, K. O'Brien, and K. O'Brien
• OpenMP Tasks in IBM XL Compilers

  X. Teruel, P. Unnikrishnan, X. Martorell, E. Ayguade, R. Silvera, G. Zhang, and E. Tiotto
• Evaluation of Memory Performance on the Cell BE with the SARC Programming Model

  R. Ferrer, M. González, F. Silla, X. Martorell, and E. Ayguade
• Evaluation of OpenMP Task scheduling strategies

  A. Duran, J. Corbalán, and E. Ayguade
• Extending the OpenMP Tasking Model to Allow Dependent Tasks

  A. Duran, J. M. Pérez, E. Ayguade, R. M. Badia, and J. Labarta
• Improving Web Server Performance Through Main Memory Compression

  V. Beltran, J. Torres, and E. Ayguade
• Understanding tuning complexity in multithreaded and hybrid web servers

  V. Beltran, J. Torres, and E. Ayguade