Mateo Valero Cortes

2016

• Runtime-Guided Mitigation of Manufacturing Variability in Power-Constrained Multi-Socket NUMA Nodes

  ICS '16 Proceedings of the 2016 International Conference on Supercomputing

  D. Chasapis, M. Casas, M. Moreto, M. Schulz, E. Ayguade, J. Labarta, and M. Valero
• Alya: Multiphysics engineering simulation toward exascale

  Journal of Computational Science

  M. Vázquez, G.. Houzeaux, S. Koric, A. Artigues, J. Aguado-Sierra, R. Aris, D. Mira, H. Calmet, F. M. Cucchietti, H. Owen, A. Taha, E. Burness, J M.. Cela, and M. Valero
• On-the-Fly Adaptive Routing for Dragonfly Interconnection Networks

  Journal of Supercomputing

  M. Garcia, E. Vallejo, R. Beivide, C. Camarero, M. Valero, G. Rodríguez, and C. Minkenberg
• Sensible Energy Accounting with Abstract Metering for Multicore Systems

  ACM Transactions on Architecture and Code Optimization (TACO)

  Q. Liu, M. Moreto, J. Abella, F. Cazorla, D. A. Jiménez, and M. Valero
• Thread Assignment in Multicore/Multithreaded Processors: A Statistical Approach

  IEEE Transactions on Computers

  P. Radojkovic, P. Carpenter, M. Moreto, V. Cakarevic, J. Verdú, A. Pajuelo, F. Cazorla, M. Nemirovsky, and M. Valero

2015

• Imposing coarse-grained reconfiguration to general purpose processors

  2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)

  M.. Duric, M.. Stanic, I.. Ratkovic, O.. Palomar, O. Unsal, A.. Cristal, M. Valero, and A.. Smith
• Performance and Energy Efficient Hardware-Based Scheduler for Symmetric/Asymmetric CMPs

  Computer Architecture and High Performance Computing (SBAC-PAD), 2015 27th International Symposium on

  N. Markovic, D. Nemirovsky, O. Unsal, M. Valero, and A. Cristal
• Joint Circuit-System Design Space Exploration of Multiplier Unit Structure for Energy-Efficient Vector Processors

  2015 IEEE Computer Society Annual Symposium on VLSI

  I. Ratković, O. Palomar, M. Stanic, M. Duric, D. Peic, O. Unsal, A. Cristal, and M. Valero
• Hardware Round-Robin Scheduler for Single-ISA Asymmetric Multi-core

  Euro-Par 2015: Parallel Processing

  N. Markovic, D. Nemirovsky, V. Milutinović, O. Unsal, M. Valero, and A. Cristal
• VSR sort: A novel vectorised sorting algorithm & architecture extensions for future microprocessors

  2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA)

  T. Hayes, O. Palomar, O. Unsal, A. Cristal, and M. Valero