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2004

Introducing Kilo-instruction Multiprocessors

XV Jornadas de Paralelismo

M. Galluzzi, V. Puente, O. J. Santana, C. Acosta, A. Cristal, R. Beivide, J. A. G. Monasterio, and M. Valero
Out-of-Order Commit Processors

10th International Symposium on High Performance Computer Architecture (HPCA-10)

A. Cristal, D. Ortega, J. Llosa, and M. Valero
Direct Instruction Wakeup for OOO processors

Innovative Architecture for Future Generation High-Performance Processors and System

M. A. Ramírez, A. Cristal, L. A. Villa, A. Veidenbaum, and M. Valero
Toward Kilo-instruction Processors

ACM Transactions on Architecture and Code Optimization

A. Cristal, O. J. Santana, M. Valero, and J. F. Martínez
A case for resource-conscious out-of-order processors: towards kilo-instruction in-flight processors

ACM SIGARCH Computer Architecture News

A. Cristal, J. F. Martínez, J. Llosa, and M. Valero
Future ILP processors

International Journal of High Performance Computing and Networking

A. Cristal, J. Llosa, M. Valero, and D. Ortega
A partitioned instruction queue to reduce instruction wakeup energy

International Journal of High Performance Computing and Networking

M. A. Ramírez, A. Cristal, M. Valero, A. Veidenbaum, and L. A. Villa
Computational modeling of the catalytic reaction in triosephosphate isomerase.

Journal of molecular biology

V. Guallar, M. Jacobson, A. McDermott, and R. A. Friesner
Cytochrome P450CAM enzymatic catalysis cycle: a quantum mechanics/molecular mechanics study.

Journal of the American Chemical Society

V. Guallar, and R. A. Friesner
Feasibility of QoS for SMT by Resource Allocation.

Lecture Notes in Computer Science (LNCS)

F. Cazorla, P. Knijnenburg, R. Sakellariou, E. Fernández, A. Ramirez, and M. Valero

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