Barcelona Build vs Buy HPC Summit 3B4HPC

3B4HPC brings together the leading research and industrial partners that drive the development of the European HPC ecosystem

Date: 30/Jun/2022 Time: 09:00 - 01/Jul/2022 Time: 21:00

Place:
Sala Actes Vertex, Campus Nord UPC  (3 minutes walk from BSC - Directions HERE)

Vèrtex (VX), 08034 Barcelona

&

BARCELONA SUPERCOMPUTING CENTER

Plaça d'Eusebi Güell, 1-3, 08034 Barcelona

 

 

Cost: Delegates will pay for their own travel and hotel  / Meals and programme will be funded by BSC

Primary tabs

Europe has a renewed focus on digital autonomy, especially for HPC. However, the current ecosystem does not support this goal. 3B4HPC brings together the leading research and industrial partners that drive the development of the European HPC ecosystem. We will link the research and industrial applications and use-cases (HPC consumers) to map out the technology opportunities that exist to drive European HPC technologies (HPC producers) of the future and the related markets that can sustain the supply chain. 3B4HPC strengthens the bonds between research and industry, defining the Research & Innovation needs and technology transfer paths, leading to a vibrant European HPC ecosystem, leverage the existing software and building new European hardware and software components.

OBJECTIVES

Bringing together research and industry leaders in HPC. Target particular HPC and Enterprise HPC use cases to discuss leading edge SW and HW with co-design in mind. Define the state of the art in HPC and help define the future European HPC roadmap.
 

Day 1 Presentation and discussion of the SW and HW stacks commonly used for HPC applications in Automotive, Engineering, Life Science and Weather.

Day 2 Presentation of European HPC initiatives and Panels on the HPC ecosystem.

TOPICS:  Automotive (HLRS) - HPC Engineering (JSC) - Life Science (BSC)  - Weather (ECMWF)

Speakers

GO to ---> PROGRAM DAY 1 - June 30th 2022

Presentation and discussion of the SW and HW stacks commonly used for HPC applications in Automotive, Engineering, Life Science and Weather.

GO to --->  PROGRAM DAY 2 -July 1st 2022

Presentation of European HPC initiatives and Panels on the HPC ecosystem.

 

---->DOWNLOAD 3B4HPC SUMMIT SUMMARY SLIDES

---->OTHER SLIDES BELOW

 

 

PROGRAM DAY 1 - June 30th 2022

Time Title
Speaker(s)
08:30 REGISTRATION @Floor -1 Vertex Building, Sala d´ACTES  LOCATION: SALA ACTES VERTEX

https://goo.gl/maps/H8x3jVgM1vT3ycMP7
9:00 to 9:30

Intro and Goals - BSC Intro -

*SLIDES*

Mateo Valero (BSC)

John Davis (BSC)

9:30 to 10:00

Intro EURO HPC

“Towards a federated European HPC ecosystem” 

*SLIDES*

Daniel Opalka - EURO HPC

Joint Undertaking (JU)

 

10:00 to 11:00

Keynote HPC HW/ SW Stack

"Fugaku Co-Designing from Genesis to Productive Present"

*SLIDES*

Satoshi Matsuoka (RIKEN)
11:00 to 11:30 Break (30 mins) LOCATION: Vertex Garden
11:30 to 12:30

Life Science SW/HW Stack

"Computational challenges in the future of molecular biology and Personalized Medicine" -

*SLIDES*

Arnau Montagud Aquino and Jose Carbonell (BSC)
12:30 to 13:30

Engr/IT/Industry SW/HW Stack

"Engineering Applications: CoE RAISE and Beyond"

 

Thomas Lippert

(Jülich Supercomputing Centre)

13:30 GROUP Photo at the Foyer Marenostrum Stairs (before lunch)
LOCATION: BSC Foyer Capella Marenostrum 4
13:30 to 14:15

Lunch

LOCATION: BSC Foyer Capella Marenostrum 4
14:15 to 15:00 MN 5 tour LOCATION: BSC HQ
15:00 to 16:00

Automotive SW/HW Stack

“Automotive/Engineering requirements on Hardware and Software - Today and Future”

*SLIDES*

Bastian Koller and Andreas Wierse (HLRS)
16:00 to 17:00

Weather SW/HW Stack

Christine Kitchen and Thomas Geenen (ECMWF)
17:00 to 17:15 Break LOCATION: Vertex Garden
17:15 to 18:15 Industry Panel

Jean Marc Denis (Sipearl), Emmanuel Le Roux (ATOS) , Utz-Uwe Haus (HPE), Phil Thierry (Intel) , Gabriele Paciucci (Nvidia)

18:15 to 19:00 Shuttle pick up at Vertex - Travel to MNAC Museum  
19:00 to 20:00 MNAC Museum Tour/ Free Time LOCATION:

20:00 to 22:00 Dinner @ Oleum MNAC Museu Nacional Art de Catalunya LOCATION:

22:30-

Shuttle pick up @MNAC -

Travel to BSC HQ + Hotel Abba Garden

 

 

 

 
Time
Title
Speakers
9:00 to 9:30

Introduction/Recap

INTRO DAY 2 *SLIDES*

John Davis (BSC)
9:30 to 10:00

EPI GPP: SiPearl

"How a European Research and Innovation project has become a successful industrial story"

*SLIDES*

Jean-Marc Denis (Sipearl)
EPI EPAC: 
 
10:30 to 11:00

Quantum Computing in EU

"Towards EuroQCS – the European Quantum Computer and Simulation infrastructure"

*SLIDES*

Kristel Michielsen (Juelich)
11:00 to 11:30 Break LOCATION: Vertex Garden
11:30 to 13:00 HPC Center HW Panel
13:00 to 14:30 Lunch LOCATION: Vertex Garden
14:30 to 16:00 Panel on Future HPC Systems (HW & SW) Satoshi Matsuoka (RIKEN), Mateo Valero (BSC), Thomas Lippert (Jülich), Jean-Philippe Nominé (CEA)
16:00 to 16:30 Break
LOCATION: Vertex Garden
16:30 to 18:00

Discussion, Wrap Up, next steps...

*SLIDES*

BSC leads discussion
18:00 to 20:00 Dinner at BSC
LOCATION: BSC Foyer Capella Marenostrum 4
20:30 Shuttle pick up @BSC - Travel to Hotel Abba Garden  

 

SPEAKERS - TALK TITLES + BIOS DAY 1

TITLE

INTRO and GOALS - 30/06 9:00 to 9:30

JOHN DAVIS

(BSC)

John D. Davis is the Director of the Laboratory for Open Computer Architecture at Barcelona Supercomputing Center. He has published over 30 refereed conference and journal papers in Computer Architecture (ASIC and FPGA-based domain-specific accelerators, non-volatile memories and processor design), Distributed Systems, and Bioinformatics. He also holds over 35 issued or pending patents in the USA and Europe. He has designed and built distributed storage systems in research and as products. John has led the entire product strategy, roadmap, and execution for a big data and analytics company. He has worked in research at Microsoft Research, where he also co-advised 4 PhDs, as well as large and small start-up companies. John holds a B.S. in Computer Science and Engineering from the University of Washington. He also holds a M.S. and Ph.D. in Electrical Engineering from Stanford University. At BSC, John is leading the MEEP project and is the technical leader of the eProcesor project and the European PILOT project. He also leads several industrial research collaborations, all centered around a full open source ecosystem from software down to hardware, open source processors and accelerators. John is the founder and chair of the RISC-V Special Interest Group on High Performance Computing (SIG-HPC)

http://www.bsc.es/cv-mateo/ is profesor of Computer Architecture at Technical University of Catalonia (UPC) and is the Founding Director of the Barcelona Supercomputing Center, where his research focuses on high performance computing architectures. He has published approximately 700 papers, has served in the organization of more than 300 International Conferences and has given more than 600 invited talks. Prof. Valero has been honored with numerous awards, among them the three most relevant awards in the Computer Architecture field: The Eckert-Mauchly Award 2007 by IEEE and ACM, the Seymour Cray Award 2015 by IEEE and the Charles Babbage 2017 by IEEE. Among other awards, Prof. Valero has received The Harry Goode Award 2009 by IEEE, The Distinguish Service Award by ACM and the Spanish National awards “Julio Rey Pastor” and “Leonardo Torres Quevedo”. Prof. Valero is a "Hall of the Fame" member of the ICT European Program (selected as one of the 25 most influents European researchers in IT during the period 1983-2008, Lyon, November 2008). In 2020 he was awarded the “HPCWire Reader’s Choice Awards” “for his exceptional leadership in HPC” and forbeing an HPC pioneer since 1990 and the driving force behind the renaissance of European HPC independence”. He has been also honored with “Condecoración de la Orden Mexicana del Águila Azteca” 2018, the highest recognition granted by the Mexican Government. Prof. Valero holds Honorary Doctorate by 10 Universities, is member of 9 academies and a fellow of IEEE and ACM, and Fellow of AAIA, Asia-Pacific Artificial Intelligence Association.

In 1998 Mateo Valero was distinguished as “Favourite Son” of his home town, Alfamén (Zaragoza) and in 2006, his native town of Alfamén named its Public School after him.

TITLE
ABSTRACT

The presentation introduces the EuroHPC Joint Undertaking (JU) and its role in the coordination and management of the pooled resources of currently 32 Participating States and three industry associations. An overview of the JU’s mission, its member structure and budget is provided.

A general perspective on the HPC value chain is outlined, which is supported through a range of funding instruments at the disposal of the JU. The current JU infrastructure is briefly presented and the JU’s vision of a user-driven HPC ecosystem including forthcoming extensions of the EuroHPC infrastructure by 4 mid-range and one exascale supercomputers. Finally, the critical role of EuroHPC Hosting Entities representing focal points of HPC expertise at the intersection of application users and developers, technology developers and suppliers, and infrastructure is highlighted.

DANIEL OPALKA

(EURO JU HPC)

Daniel Opalka is the Head of R&I at the European High Performance Computing Joint Undertaking (JU) since February 2020. The appointment follows a long track record in HPC, centred around applications of HPC to scientific challenges in chemistry, physics, materials science and quantum mechanics.

Daniel graduated from the University of Regensburg, Germany, with a diploma in Theoretical Chemistry using HPC to perform molecular dynamics simulations. This was followed by a PhD in quantum chemistry at the Technical University Munich, Germany, with the development of methods to model the motion of atomic nuclei on the basis of numerical simulations and electronic structure theory. Daniel continued his career at the University of Cambridge as a university teacher and researcher on applications of electronic structure theory in simulations of condensed matter, and at the Max Planck Institute for Solid State Research in Stuttgart, Germany, working on quantum Monte-Carlo methods for highly accurate electronic structure calculations. Before joining the EuroHPC Joint Undertaking he was head of a research group at the Technical University of Munich, focusing on massively parallel simulations in computational materials science in the context of nanoparticle-catalysed chemical reactions for the production of green hydrogen.

 

TITLE

Keynote HPC HW/ SW Stack

Abstract
Fugaku has been co-designed ground-up from its genesis to its very productive present form, starting from 2010, just prior to its predecessor, the K Computer, was being completed. Based on its idealism expressed in its name, Fugaku or Mount Fuji, in that high performance and broad applicability were to be satisfied simultaneously, R&D of Fugaku was an extreme challenge, only made possible through extensive co-design between the systems teams centered around R-CCS and Fujitsu, and all-Japan involvement of the major application teams. The resulting machine, Fugaku, has turned out to be highly successful, not only meeting and often greatly exceeding its performance goals, but also becoming the target infrastructure of a number of groundbreaking applications, including the anti COVID-19 program.

Satoshi Matsuoka

(Director, Riken R-CCS)

 

Satoshi Matsuoka from April 2018 has been the director of Riken Center for Computational Science (R-CCS), the top-tier national HPC center for Japan, developing and hosting Japan’s flagship ‘Fugaku’ supercomputer which has become the fastest supercomputer in the world in all four major supercomputer rankings in 2020 and 2021 (Top500, HPCG, HPL-AI, Graph500), along with multitudes of ongoing cutting edge HPC research being conducted, including investigating Post-Moore era computing. He was the leader of the TSUBAME series of supercomputers that had also received many international acclaims, at the Tokyo Institute of Technology, where he still holds a professor position, to continue his research activities in HPC as well as scalable Big Data and AI, in both institutions. His commendations include the Fellow positions in societies/conferences ACM, ISC, and the JSSST; the ACM Gordon Bell Prize in 2011 & 2021 and the IEEE Sidney Fernbach Award in 2014, all being one of the highest awards in the field of HPC; the Technical Papers Chair and the Program Chair for ACM/IEEE Supercomputing 2009 and 2013 (SC09 and SC13) respectively as well as many other conference chairs, and the ACM Gordon Bell Prize selection committee chair in 2018. In April 2022, he was awarded the Medal of Honor with Purple Ribbon for longtime outstanding contribution to the academia by his majesty Emperor Naruhito.

 

TITLE

Life Science SW/HW Stack

Computational challenges in the future of molecular biology and Personalized Medicine" - 30/06 - 11:30 to 12:30

ABSTRACT

Life sciences are increasingly adopting computational simulations to model complex biological systems, such as healthy tissues and tumours. To achieve this goal, the scientific community is contributing to the development and refactoring of a set of widely used applications covering different essential aspects of molecular biology, such as molecular dynamics, multiscale modelling or single-cell sequence analysis. These crucial developments will provide tools and workflows adapted to future heterogeneous exascale HPC architectures, representing feasible computational protocols to develop digital twins with the ability to predict the eCffect of a given drug treatment on a real patient.

Arnau Montagud Aquino

(BSC)

 

Is a Researcher at BSC’s Life Sciences department working on Boolean and multiscale models in cancer. Arnau is a BSc in Biology and MSc in Cell Biology by the University of Valencia and PhD in the Department of Applied Mathematics in the Technical University of Valencia. His research on Metabolic Engineering of hydrogen in cyanobacteria led him to be visiting researcher at Uppsala University, Denmark Technical University and EMBL Heidelberg. After graduating, Arnau decided to apply modelling techniques to cancer using Boolean models, agent-based models and data deconvolution and integration, first at Institut Curie’s Systems Biology department and currently at BSC’s Life Sciences department.

Jose Carbonell (BSC)

Is a postdoctoral research scientist in the Life Sciences Department at the BSC. He studied computer science at the Technical University of Valencia (UPV). Subsequently, he completed a master's degree in biostatistics at the University of Valencia (UV), where he also conducted his PhD studies in statistics developing different mathematical models for studying genomic heterogeneity in cancer. Throughout his professional career, he has been involved in the development of many widely used computational data analysis frameworks spanning different disciplines such as quality control of sequencing data, variant calling, genome integrity assessment, chromatin dynamics and network-based analysis, among others. In recent years, he has focused his research on the development of new statistical methods for molecular pathway analysis. In particular, he focused on statistical modelling of signalling pathways, contributing new approaches to quantify pathway activity and hierarchical matrix deconvolution methods to understand sample heterogeneity in cancer.

 

TITLE

JSC - HPC Engineering use case  - 30/06 - 12:30 to 13:30

Engr/IT/Industry SW/HW Stack - "Engineering Applications: CoE RAISE and Beyond"

ABSTRACT

Artificial intelligence (AI) methods have gained immense popularity in scientific and industrial applications in the past few years. Engineering is just one of many fields benefiting from new developments made in AI. Such new technologies not only enable to automate processes or to analyze complex data, but they also allow to accelerate predictions of physical processes based on learnt knowledge. To obtain highly-accurate models for complex physical phenomena, the underlying training data need to feature high temporal and spatial resolutions. Consequently, huge amounts of data need to be processed in the training thus necessitating (modular) high-performance computing (HPC) systems to yield reasonable times-to-solution. The European Center of Excellence in Exascale Computing “Research on AI- and Simulation-Based Engineering at Exascale” (CoE RAISE) investigates and develops AI methods suited for large-scale trainings on the next-generation of supercomputers. These methods are developed along simulation- and data-driven use cases coming from, e.g., turbulence or combustion research, high-energy physics, or remote sensing applications. This presentation provides an overview of the contributions of the Jülich Supercomputing Centre and its partners to CoE RAISE and to other projects that combine engineering applications with AI technologies. Different methods such as scaling autoencoders, graph neural networks, or reinforcement learning algorithms as well as the role of hyperparameter optimization are discussed for applications from aerospace, physics, or medicine.

Thomas Lippert

(Jülich Supercomputing Centre)

Prof. Dr. Dr. Thomas Lippert is the director of the Institute for Advanced Simulation (IAS) at Forschungszentrum Jülich, Germany. He is the head of the Jülich Supercomputing Centre (JSC), a division of the IAS, and acts as managing director of the John von Neumann Institute for Computing (NIC). He is professor for Modular Supercomputing and Quantum Computing at the Goethe University Frankfurt, Germany. He is chair of the board of directors of the Gauss Centre for Supercomputing e.V. From 2018 to 2020 (June), he was chair of the council of the Partnership for Advanced Computing in Europe (PRACE). Currently, he acts as German representative at the PRACE council. Since 2019, he has been spokesman of the Helmholtz Programme “Engineering Digital Futures: Supercomputing, Data Management and Information”. He has initiated the series of Europe founded DEEP projects. In 2022, he was elected vice chair of the RIAG of the EuroHPC JU.

 

TITLE

HLRS - Automotive use case - Automotive SW/HW Stack - 30/06 15:00 to 16:00

“Automotive/Engineering requirements on Hardware and Software - Today and Future”

ABSTRACT

“We will give a glance on currently used Hardware and Software in Engineering with a focus on the automotive sector. Then we will give insights on the identified future needs and desires of these communities”

Dr. Bastian Koller

(HLRS)

Managing Director of the High Performance Computing Centre. Studied computer-science and chemistry, PhD in Enginnering. Since 2004 active in R&D around HPC and associated technologies. Coordinator of EuroCC/CASTIEL and the Centre of Excellence in Engineering.

Dr. Andreas Wierse

(HLRS)

Acts since 2011 as Managing Director of SICOS BW GmbH, located in Stuttgart. The company was founded by the University of Stuttgart and the Karlsruhe Institute of Technology (KIT) to support small and medium sized enterprises in the uptake of HPC and smart data technology and is financially supported by the ministry for science, research and art of Baden-Württemberg and its shareholders

He is one of the founders of the Smart Data Solution Center BW (SDSC-BW); the experience he and his project partner Dr. Till Riedel gained there formed the basis for the „Smart Data Analytics“ Compendium for entrepreneurs, published by DeGruyter in 2017.

Since 2014 is his also managing director of HWW GmbH, a public/private partnership for industrial use of HPC including shareholders like Porsche, T-Systems and the state of Baden-Württemberg. In May 2018 he was appointed as member of the board of DigitalSüdwest 2025 to support SMEs in the southwest on their path towards digital transformation.

 

TITLE

Weather SW/HW Stack - ECMWF  30/06 16:00 to 17:00

ABSTRACT

ECMWF Part 1: operational models: Simulations in a data-rich environment (Thomas Geenen)

ECMWF Part 2: Predicting trends to support Weather and Climate forecasts (Christine Kitchen)

ECWWF is both a research institute and a 24/7 operational service. In this context we need to reliably deliver products that our member states require, while at the same time continuously push the technological envelope to prepare for the next generation of numerical weather prediction. ECMWF has an established track record, involved in many research projects to explore emerging architectures. To this end we developed a series of so-called dwarfs or mini applications that capture performance critical and particularly complex components of our models. These dwarfs are open sourced and available on github to allow for co-development and contributions from external parties. In this talk we will highlight some or our findings from the projects and explain some of the characteristics of our numerical methods and algorithms.

The second part of the talk will explore some of the wider opportunities from a supercomputing facility perspective, briefly describing ECMWFs new facility in Bologna and exploring potential challenges facing the community. A few ideas are raised to foster discussions about how we might be able to collaboratively develop a series of frameworks, standards, and representative benchmarks to inform future service designs and ensuring a vibrant support infrastructure continues to flourish.

Christine Kitchen

(ECMWF)

Deputy Director of Computing Department, ECMWF

With over 20 years experience in establishing and operating supercomputing centres in the UK, I joined ECMWF at the beginning of 2022 in the role of Deputy Director of Computing. Originally qualified as a Chemist, my first exposure to research computing was during my final year studies and subsequent PhD in theoretical chemistry – working at AstraZeneca Pharmaceuticals undertaking analysis into Poisson-Boltzmann techniques to aid biomolecular drug design and identification of potential therapeutic candidates. A slight career trajectory change involved inheriting more responsibility for routine system administration of clusters – eventually culminating in technical evaluation of latest research computing solutions (servers - storage – interconnects – cluster management tools), including benchmarking systems to advise UK HEIs in the optimal solutions to support the research drivers and associated procurement processes (technical advisor in UK’s SRIF3 coordinated HPC procurements). Establishing a trusted and impartial technical role was recognized by my peers, resulting in election to chair the UK’s High Performance Computing Special Interest Group (HPC-SIG) and invitations to participate on a number of UKRI panels as an advisor into technology trends and investment strategies. Currently I’m a member of EPSRC’s Archer-2 management board. Prior to joining ECMWF, I spent almost 15 years at Cardiff University – building a new Advanced Research Computing Division, including overseeing the implementation of a datacentre and supercomputing facility. Based on the success and research impact, secured Welsh European Funding (WEFO) to establish a national supercomputing service – HPC Wales and subsequent phase Supercomputing Wales, operated as a partnership across Welsh Universities – recruiting a pool of technical experts to ensure the effective exploitation of resources by the research community (industry and academia). This included challenges of connecting distributed resources and implementation of a dedicated backend network. I’ve joined ECMWF at an exciting time, transitioning operations to a new datacentre in Bologna (Italy) and entering the final stages of the acceptance of the Atos Sequana XH2000 supercomputing facility prior to commencing full operational service later in the year. Outside the workplace, I love to spend time away from technology – enjoying walks and hiking in the Welsh countryside – sometimes with a Springer Spaniel as a companion.

Thomas Geenen

(ECMWF)

 

Thomas Geenen is the technology partnership lead for Destination earth at ECMWF, focussing on the integration of our evolving digital agenda in the European digital landscape. He brings over 20 years of experience in HPC and HPDA, both working in academia and industry. Before joining ECMWF at the beginning of 2022, he worked at ASML, leading the enablement teams for simulation and large-scale data-analytics as well as managing the globally distributed simulation platforms. Thomas worked on digital twins at ASML in an industrial setting and now combines this with his academic background in solid earth system modelling to create digital twin(s) of the earth.

 

TITLE

Industry Panel 30/06 17:15 to 18:15

Emmanuel Le Roux

(ATOS)

Group Senior Vice President, Head of Advanced Computing, HPC, Quantum, AI Solutions

Leading the Global Advanced Computing, HPC, AI and Quantum Global Business line within ATOS, Emmanuel is in charge of the Global P&L of this activity from Product Strategy, roadmap, go to market, sales, presales and post-Sales support activities. In this role, Emmanuel is managing a international team of expert in HPC, AI and Quantum Computing, delivering the most powerful and energy efficient SuperComputer in the world. We are #1 in Europe, #3 in the world, delivering to the most important public and private research centers, engineering and innovation labs in the world.

In his previous position, Emmanuel was responsible for the overall Big Data infrastructure portfolio, including innovative Big Data Analytics, Machine Learning and AI solutions for the Enterprise market. The global portfolio includes Atos Enterprise Servers (x86, Mainframe), the SAP Hana, Oracle, Hadoop, AI and Analytics appliances as well as the Big Data Software and Services teams.

Emmanuel has many years of experience in the IT and telecoms industry having worked in product management, business development, marketing & sales as well as R&D, architecture & strategy and program management. He is an expert in Big Data solutions (Hadoop, Analytics, ML and AI), IT infrastructure (servers, storage, networking), server virtualisation, cloud computing, OS, Database, Middleware, OSS/BSS and Voice over IP technologies.

Gabriele Paciucci is Sr. Solution Architect at NVIDIA in EMEA designing complex solutions for Supercomputing and HER customers. He worked for Intel, Cray and HPE where he was part of the core technical teams who designed complex HPC systems including SuperMUC-NG at LRZ, COBRA at MPCDF, ARCHER-2 for UKRI and LUMI at CSC. Recently at NVIDIA, he collaborated with ATOS to define the accelerated and emerging technology partitions of Marenostrum5.

Gabriele is author of several peer reviewed papers and articles, product documentation and installation guides. He is involved in several open-source projects including Lustre and has promoted the adoption of open source software and Linux since 2000 when he worked as software engineer at Red Hat. Gabriele received his Master’s Degree in Chemical Engineering from Università degli Studi di Roma La Sapienza in 1999.

Jean-Marc Denis is Chief Strategy officer and co-founder at SiPearl. The Company designing the first European HPC microprocessor.
Prior to that, he was Chief of Staff in the Innovation and Strategy division at Atos. Since the middle of 2018, Jean-Marc has been Chair of the Board of the European Processor Initiative (EPI). In 2016 and 2017, he’s overseen BigData Division strategy at ATOS/Bull.
After several positions in the HPC industry, Jean-Marc joined Bull in 2004 to launch the HPC activity. Since that, Atos/Bull has become #3 at worldwide level and #1 European supercomputers vendor.
Jean-Marc is has Master degree in Mathematics from the University of Tours (France), a Master dree in Computer science from the University of Toulouse (France) and an Ingenieur degree from ENSEEIHT (Toulouse, France)

 

Dr. Utz-Uwe Haus, Head of the HPE HPC/AI EMEA Research Lab (ERL), studied mathematics and computer science at the Technical University of Berlin (TU Berlin). After obtaining a doctorate in mathematics at the University of Magdeburg (Germany) he worked on nonstandard applications of mathematical optimization in chemical engineering, material science, and systems biology. He co-founded CERL, the CRAY EMEA Research Lab in 2015, which is now the HPE HPC/AI ERL. His research interests focus on parallel programming and data aware scheduling problems, data analytics in the context of semantic databases, and novel compute architectures, and their relation to Mathematical Optimization and Operations Research, as well as GreenHPC, i.e., making data centers flexible and efficient energy network participants in a decentralized European energy landscape.

Phil is a Senior Principal Engineer in charge of Workload Research, Analysis and Predictions, delivering architecture decomp and system PnP metrics ahead of product concept. Phil joined Intel 16 years ago where he led the Oil and Gas engineer team for 6 years and then work on codesign and pathfinding with EMEA partners. He has a Ph.D. in Geophysics from Paris School of Mines on 3D seismic imaging, where he did spend 13 years as a research assistant before joining SGI benchmarking team.

 

 

TITLE

Introduction/Recap - 01/07 09:00 to 9:30
John Davis (BSC)

John D. Davis is the Director of the Laboratory for Open Computer Architecture at Barcelona Supercomputing Center. He has published over 30 refereed conference and journal papers in Computer Architecture (ASIC and FPGA-based domain-specific accelerators, non-volatile memories and processor design), Distributed Systems, and Bioinformatics. He also holds over 35 issued or pending patents in the USA and Europe. He has designed and built distributed storage systems in research and as products. John has led the entire product strategy, roadmap, and execution for a big data and analytics company. He has worked in research at Microsoft Research, where he also co-advised 4 PhDs, as well as large and small start-up companies. John holds a B.S. in Computer Science and Engineering from the University of Washington. He also holds a M.S. and Ph.D. in Electrical Engineering from Stanford University. At BSC, John is leading the MEEP project and is the technical leader of the eProcesor project and the European PILOT project. He also leads several industrial research collaborations, all centered around a full open source ecosystem from software down to hardware, open source processors and accelerators. John is the founder and chair of the RISC-V Special Interest Group on High Performance Computing (SIG-HPC)

 

TITLE

EPAC SiPearl and EPI "How a European Research and Innovation project has become a successful industrial story" - 01/07 9:30 to 10:00

ABSTRACT

In this presentation, after a short introduction about SiPearl and the European Processor Initiative, it will be explained the codesign process that has been chosen to create and innovate, while targeting short term technological and industrial objectives

Jean-Marc Denis

(Sipearl)

Jean-Marc Denis is Chief Strategy officer and co-founder at SiPearl. The Company designing the first European HPC microprocessor.

Prior to that, he was Chief of Staff in the Innovation and Strategy division at Atos. Since the middle of 2018, Jean-Marc has been Chair of the Board of the European Processor Initiative (EPI). In 2016 and 2017, he’s overseen BigData Division strategy at ATOS/Bull.

After several positions in the HPC industry, Jean-Marc joined Bull in 2004 to launch the HPC activity. Since that, Atos/Bull has become #3 at worldwide level and #1 European supercomputers vendor.

Jean-Marc is has Master degree in Mathematics from the University of Tours (France), a Master dree in Computer science from the University of Toulouse (France) and an Ingenieur degree from ENSEEIHT (Toulouse, France)

   
TITLE

 EPI GPP "RISC-V "accelerator" in EPI - 01/07 10:00 to 10:30

ABSTRACT
A small part of the EPI project has been developing an "accelerator" for HPC and emerging application areas based on the RISCV architecture.
The objective has been to  develop a fully owned European implementation of processors named EPAC (for European Processor Accelerator).
The EPAC architecture merges a general RISCV Vector architecture, a Variable precision processor (VRP)  and a specialized neural network and stencil accelerator (STX).
The project has produced a test chip  in GF22nm  technology, featuring 4 vector cores, 2 STX clusters and one VRP processor.
The talk will focus on the RISC-V Vector architecture, describing the fundamental aspects of the vision behind the design and the overall resulting architecture and then report on the achievements and current status.
In parallel, an FPGA implementation of the vector core and memory subsystem has been implemented to be used as a software development vehicle (SDV), CI and co-design support infrastructure.
This system runs as stand alone self hosted Linux node where general purpose application from the HPC but also other domains can be run.
I will report some initial results of these evaluations and comparisons to other state of the art architectures.

Jesús Labarta

(BSC)

 

 

Prof. Jesús Labarta received his Ph.D. in Telecommunications Engineering from UPC in 1983, where he has been a full professor of Computer Architecture since 1990. He was Director of European Center of Parallelism at Barcelona from 1996 to the creation of BSC in 2005, where he is the Director of the Computer Sciences Dept. His research team has developed performance analysis and prediction tools and pioneering research on how to increase the intelligence embedded in these performance tools. He has also led the development of OmpSs and influenced the task based extension in the OpenMP standard. He has led the BSC cooperation with many IT companies. He is now responsible of the POP center of excellence providing performance assessments to parallel code developers throughout the EU and leads the RISC-V vector accelerator within the EPI project. He has pioneered the use of Artificial Intelligence in performance tools and will promote their use in POP, as well as the AI-centric co-designing of architectures and runtime systems. He was awarded the 2017 Ken Kennedy Award for his seminal contributions to programming models and performance analysis tools for high performance computing, being the First Non US Researcher receiving it.
TITLE
ABSTRACT
For practical quantum computing, HPC supercomputing infrastructures shall integrate quantum computers and simulators (QCS) in addition to cloud access to stand- alone QCS.
As longterm experience in conventional supercomputing demonstrate, the successful integration of QCS into HPC systems requires a focus on all three fundamental components of the HPC ecosystem: users and their applications, software, and hardware. A broad user community will need to invest time and effort in developing new kinds of algorithms and software for real-world applications that take full advantage of the QCS as accelerators that speed up existing classical algorithms and software. In addition, a QCS full software stack will have to be developed that takes into account the various kinds of QCS hardware that is implemented on a variety of qubit platforms.
 
Finally, the development of use cases in a co- design approach with "hybrid" computing architectures in mind, will make it possible to address research challenges that cannot be met with current HPC architectures. The High Performance Computer and Simulator hybrid (HPCQS) infrastructure, the pan-European hybrid HPC/quantum infrastructure supported by the European High- Performance Computing Joint Undertaking (EuroHPC JU) and six European countries (Austria, France, Germany, Ireland, Italy and Spain) realizes, after the Jülich UNified Infrastructure for Quantum computing (JUNIQ), a second step towards a European Quantum Computing and Simulation Infrastructure (EuroQCS), as advocated for in the Strategic Research Agenda of the European Quantum Flagship.

Kristel Michielsen

(Forschungszentrum Jülich)

 

Prof. Dr. Kristel Michielsen is group leader of the Quantum Information Processing group at the Jülich Supercomputing Centre (JSC), Forschungszentrum Jülich and Professor of Quantum Information Processing at RWTH Aachen University. Kristel Michielsen and her group have ample experience in performing large-scale simulations of quantum systems. With her group and a team of international collaborators, she set the world record in simulating a quantum computer (QC) with 48 qubits. In 2019, she participated in a research collaboration that proved Google’s quantum supremacy. She is building up the Jülich UNified Infrastructure for Quantum computing (JUNIQ) at the JSC. Her research interests range from classical simulations of electrodynamics and quantum mechanics to quantum computing and quantum computing architectures.

 

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HPC Center HW Panel 01/07 11:30 to 13:00

Alfonso Valencia

(BSC)

Alfonso Valencia, Ph.D. in Biochemistry and Molecular Biology by the Universidad Autónoma de Madrid, is ICREA Research Professor and Director of the Life Sciences Department at the Barcelona Supercomputing Centre (BSC), Director of the Spanish National Bioinformatics Institute (INB) and head of the Spanish Node of the European Bioinformatics Infrastructure ELIXIR. He is a member of the European Molecular Biology Organisation (EMBO), and former President of the International Society for Computational Biology (ISCB). He has served in numerous Scientific Advisory Boards, including the Innovative Medicines Initiative (IMI), of which he is currently Vice Chair, the European Molecular Biology Laboratory, the Swiss Institute for Bioinformatics, among others. He is Co-Executive Editor of Bioinformatics, and member of the editorial boards of eLIFE, PeerJ and FEBS letters and F1000 Prime. He has published more than 450 articles with an h-index of 97 (Scopus profile).

Bastian Koller (HLRS)

Managing Director of the High Performance Computing Centre. Studied computer-science and chemistry, PhD in Enginnering. Since 2004 active in R&D around HPC and associated technologies. Coordinator of EuroCC/CASTIEL and the Centre of Excellence in Engineering.

Chris Kitchen (ECMWF)

Deputy Director of Computing Department, ECMWF

With over 20 years experience in establishing and operating supercomputing centres in the UK, I joined ECMWF at the beginning of 2022 in the role of Deputy Director of Computing. Originally qualified as a Chemist, my first exposure to research computing was during my final year studies and subsequent PhD in theoretical chemistry – working at AstraZeneca Pharmaceuticals undertaking analysis into Poisson-Boltzmann techniques to aid biomolecular drug design and identification of potential therapeutic candidates. A slight career trajectory change involved inheriting more responsibility for routine system administration of clusters – eventually culminating in technical evaluation of latest research computing solutions (servers - storage – interconnects – cluster management tools), including benchmarking systems to advise UK HEIs in the optimal solutions to support the research drivers and associated procurement processes (technical advisor in UK’s SRIF3 coordinated HPC procurements). Establishing a trusted and impartial technical role was recognized by my peers, resulting in election to chair the UK’s High Performance Computing Special Interest Group (HPC-SIG) and invitations to participate on a number of UKRI panels as an advisor into technology trends and investment strategies. Currently I’m a member of EPSRC’s Archer-2 management board. Prior to joining ECMWF, I spent almost 15 years at Cardiff University – building a new Advanced Research Computing Division, including overseeing the implementation of a datacentre and supercomputing facility. Based on the success and research impact, secured Welsh European Funding (WEFO) to establish a national supercomputing service – HPC Wales and subsequent phase Supercomputing Wales, operated as a partnership across Welsh Universities – recruiting a pool of technical experts to ensure the effective exploitation of resources by the research community (industry and academia). This included challenges of connecting distributed resources and implementation of a dedicated backend network. I’ve joined ECMWF at an exciting time, transitioning operations to a new datacentre in Bologna (Italy) and entering the final stages of the acceptance of the Atos Sequana XH2000 supercomputing facility prior to commencing full operational service later in the year. Outside the workplace, I love to spend time away from technology – enjoying walks and hiking in the Welsh countryside – sometimes with a Springer Spaniel as a companion.

Estela Suárez

(Jülich Supercomputing Centre)

Is research group leader at the Jülich Supercomputing Centre and Professor at the University of Bonn. Her research focuses on HPC system architectures and codesign. As leader of the DEEP project series she has driven the development of the Modular Supercomputing Architecture, including hardware, software and application implementation and validation. Additionally, since 2018 she leads the codesign efforts within the European Processor Initiative. She holds a PhD in Physics from the University of Geneva and a Master degree in Astrophysics from the University Complutense of Madrid.

 

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Panel on Future HPC Systems (HW & SW)  - 01/07 14:30 to 16:00

Mateo Valero

(BSC)

http://www.bsc.es/cv-mateo/ is profesor of Computer Architecture at Technical University of Catalonia (UPC) and is the Founding Director of the Barcelona Supercomputing Center, where his research focuses on high performance computing architectures. He has published approximately 700 papers, has served in the organization of more than 300 International Conferences and has given more than 600 invited talks. Prof. Valero has been honored with numerous awards, among them the three most relevant awards in the Computer Architecture field: The Eckert-Mauchly Award 2007 by IEEE and ACM, the Seymour Cray Award 2015 by IEEE and the Charles Babbage 2017 by IEEE. Among other awards, Prof. Valero has received The Harry Goode Award 2009 by IEEE, The Distinguish Service Award by ACM and the Spanish National awards “Julio Rey Pastor” and “Leonardo Torres Quevedo”. Prof. Valero is a "Hall of the Fame" member of the ICT European Program (selected as one of the 25 most influents European researchers in IT during the period 1983-2008, Lyon, November 2008). In 2020 he was awarded the “HPCWire Reader’s Choice Awards” “for his exceptional leadership in HPC” and forbeing an HPC pioneer since 1990 and the driving force behind the renaissance of European HPC independence”. He has been also honored with “Condecoración de la Orden Mexicana del Águila Azteca” 2018, the highest recognition granted by the Mexican Government. Prof. Valero holds Honorary Doctorate by 10 Universities, is member of 9 academies and a fellow of IEEE and ACM, and Fellow of AAIA, Asia-Pacific Artificial Intelligence Association.

In 1998 Mateo Valero was distinguished as “Favourite Son” of his home town, Alfamén (Zaragoza) and in 2006, his native town of Alfamén named its Public School after him.

Satoshi Matsuoka

(RIKEN)

Satoshi Matsuoka from April 2018 has been the director of Riken Center for Computational Science (R-CCS), the top-tier national HPC center for Japan, developing and hosting Japan’s flagship ‘Fugaku’ supercomputer which has become the fastest supercomputer in the world in all four major supercomputer rankings in 2020 and 2021 (Top500, HPCG, HPL-AI, Graph500), along with multitudes of ongoing cutting edge HPC research being conducted, including investigating Post-Moore era computing. He was the leader of the TSUBAME series of supercomputers that had also received many international acclaims, at the Tokyo Institute of Technology, where he still holds a professor position, to continue his research activities in HPC as well as scalable Big Data and AI, in both institutions. His commendations include the Fellow positions in societies/conferences ACM, ISC, and the JSSST; the ACM Gordon Bell Prize in 2011 & 2021 and the IEEE Sidney Fernbach Award in 2014, all being one of the highest awards in the field of HPC; the Technical Papers Chair and the Program Chair for ACM/IEEE Supercomputing 2009 and 2013 (SC09 and SC13) respectively as well as many other conference chairs, and the ACM Gordon Bell Prize selection committee chair in 2018. In April 2022, he was awarded the Medal of Honor with Purple Ribbon for longtime outstanding contribution to the academia by his majesty Emperor Naruhito.

Thomas Lippert

(Jülich Supercomputing Centre)

 

Prof. Dr. Dr. Thomas Lippert is the director of the Institute for Advanced Simulation (IAS) at

Forschungszentrum Jülich, Germany. He is the head of the Jülich Supercomputing Centre (JSC), a division
of the IAS, and acts as managing director of the John von Neumann Institute for Computing (NIC). He
is professor for Modular Supercomputing and Quantum Computing at the Goethe University Frankfurt,
Germany. He is chair of the board of directors of the Gauss Centre for Supercomputing e.V. From 2018
to 2020 (June), he was chair of the council of the Partnership for Advanced Computing in Europe
(PRACE). Currently, he acts as German representative at the PRACE council. Since 2019, he has been
spokesman of the Helmholtz Programme “Engineering Digital Futures: Supercomputing, Data
Management and Information”. He has initiated the series of Europe founded DEEP projects. In 2022,
he was elected vice chair of the RIAG of the EuroHPC JU.

Jean-Philippe Nominé

(CEA)

Dr. Eng. Jean-Philippe Nominé has been with CEA HPC division since 1992, now in charge of HPC strategic collaborations.

Dr. Nominé held different technical or managing positions in HPC software development, then has focused on European HPC since 2007 – with different contributions to the creation of PRACE in 2008-2011, to the creation of ETP4HPC in 2012 and its operations between 2012 and 2019, to the operations of Horizon 2020 HPC Public Private Partnership between 2014 and 2018.

He is currently a member of ETP4HPC Steering Board, ETP4HPC Vice-chair for Research, and Chair of EuroHPC Research and Innovation Advisory Group (RIAG).

J.P. Nominé, a CEA Fellow in HPC, graduated from Ecole Polytechnique in France (engineer degree) and holds a PhD from Université Pierre-et-Marie-Curie (Paris) – now Sorbonne Université - in Robotics.