Publications

Export results as:

Showing 3711 - 3720 results of 5778

2013

Circuit Design of a Novel Adaptable and Reliable L1 Data Cache

23rd ACM international conference on Great lakes symposium on VLSI

A. Seyedi, G. Yalcin, O. Unsal, and A. Cristal
Fault Tolerance for Multi-Threaded Applications by Leveraging Hardware Transactional Memory

10th conference on ACM Computing Frontiers

G. Yalcin, O. Unsal, and A. Cristal
On the Selection of Adder Unit in Energy Efficient Vector Processing

14th International Symposium on Quality Electronic Design (ISQED)

Ivan Ratkovic, O. Palomar, Milan Stanic, O. Unsal, A. Cristal, and M. Valero
FaulTM: Error Detection and Recovery Using Hardware Transactional Memory

ACM/IEEE Design, Automation, and Test in Europe (DATE)

G. Yalcin, O. Unsal, and A. Cristal
Trace Filtering of Multithreaded Applications for CMP Memory Simulation

IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2013)

A. Rico, A. Ramirez, and M. Valero
Power/Performance evaluation of Energy Efficient Ethernet (EEE) for High Performance Computing

IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2013)

S. Karthikeyan, P. Carpenter, and A. Ramirez
Experiences With Mobile Processors for Energy Efficient HPC

ACM/IEEE Design, Automation, and Test in Europe (DATE)

N. Rajovic, A. Rico, J. Vipond, I. Gelado, N. Puzovic, and A. Ramirez
Task Sampling: Computer Architecture Simulation in the Many-Core Era

22nd international conference on Parallel Architectures and Compilation Techniques

T. Grass
Supercomputing with commodity CPUs: are mobile SoCs ready for HPC?

SC13: International Conference for High Performance Computing, Networking, Storage and Analysis

N. Rajovic, P. Carpenter, I. Gelado, N. Puzovic, A. Ramirez, and M. Valero
Data placement in HPC architectures with heterogeneous off-chip memory

31nd IEEE International Conference on Computer Design

M. Pavlovic, N. Puzovic, and A. Ramirez

Pages