Publications

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2020

A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures

ACM Transactions on Architecture and Code Optimization

C. Ramírez, C. Alejandro Hernández, O. Palomar, O. Unsal, M. Antonio Ramírez, and A. Cristal

2015

Runtime-Aware Architectures

Euro-Par 2015: Parallel Processing

M. Casas, M. Moreto, L. Alvarez, E. Castillo, D. Chasapis, T. Hayes, L. Jaulmes, O. Palomar, O. Unsal, A. Cristal, E. Ayguade, J. Labarta, and M. Valero

2014

PAMS: Pattern Aware Memory System for Embedded Systems

ReConFig - International Conference on ReConFifurable Computing and FPGAs

T. Hussain, N. Sönmez, O. Palomar, O. Unsal, A. Cristal, E. Ayguade, and M. Valero
AMMC: Advanced Multi-core Memory Controller

13th International Conference on Field Programmable Technology (FPT 2014)

T. Hussain, O. Palomar, A. Cristal, O. Unsal, E. Ayguade, and M. Valero
Evaluation of vectorization potential of Graph500 on Intels Xeon Phi

International Conference on High Performance Computing {&} Simulation, HPCS 2014

Milan Stanic, O. Palomar, Ivan Ratkovic, M. Duric, O. Unsal, A. Cristal, and M. Valero
VALib and SimpleVector: tools for rapid initial research on vector architectures

ACM International Conference on Computing Frontiers

Milan Stanic, O. Palomar, Ivan Ratkovic, M. Duric, O. Unsal, and A. Cristal
ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy

17th Euromicro Conference on Digital System Design

S. KumarRethinagiri, O. Palomar, A. Sobe, G. Yalcin, A. Cristal, O. Unsal, P. Felber, C. Fetzer, G. Alioto, T. Knauth, W. Barczynski, Y. Hayduk, and J. Ryckaert
System-Level Power and Energy Estimation Methodology for Open Multimedia Applications Platforms

IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

S. KumarRethinagiri, O. Palomar, J. Arias Moreno, O. Unsal, A. Cristal, and M. Biglari-Abhar
VPPET: Virtual Platform Pow er and Energy Estimation Tool for Heterogeneous MPSoC based FPGA Platforms

4th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)

S. KumarRethinagiri, O. Palomar, J. Arias Moreno, A. Cristal, and O. Unsal
DESSERT: DESign Space ExploRation Tool based on Power and Energy at System-Level

27th IEEE International System-on-Chip Conference

S. KumarRethinagiri, O. Palomar, A. Cristal, O. Unsal, and M. Swift

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