RADLER: RISC-V Autonomous Driving LEvel four Hw/SW co-design

Status: Active Start:
01/01/2024
End:
31/12/2024

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Description

This three (3) year research project is for the development of a high performance, open source RISC-V-based hardware and software platform for Level 4 autonomous driving. The research will be performed gradually, with the first year focusing on the implementation of a functional, hardware demonstrator of the platform on an FPGA, as well as its baseline software stack. In the second year the best configuration of the hardware platform will be found, the software stack will be optimized and an autonomous driving use case will be showcased. In the 3rd year, the tape out of the designed autonomous driving architecture will be performed.

Funding