Description
The increasing power and energy consumption of modern computing devices is perhaps the largest threat to technology minimization and associated gains in performance and productivity. On the one hand, we expect technology scaling to face the problem of “dark silicon” (only segments of a chip can function concurrently due to power restrictions) in the near future and lead us to use devices with completely new characteristics. On the other hand, as core counts increase, the shared memory model based on cache coherence will severely limit scalability and increase energy consumption. Therefore, to overcome these problems, we need new computing paradigms that are radically more energy efficient.
The objective of ParaDIME was to attack the power-wall problem by radical software-hardware techniques that are driven by future circuit and device characteristics on one side, and by a programming model based on message passing on the other side. In particular ParaDIME utilized: circuit and architecture operation below safe voltage limits for drastic energy savings, the use of specialized energy-aware computing accelerators, energy-aware runtime, approximate computing and power-aware message passing.
The outcome of the project was a processor architecture for a heterogeneous distributed system that utilized future device characteristics for dramatic energy savings.
Wherever possible, ParaDIME adopted multidisciplinary techniques, such as hardware support for message passing, runtime energy optimization utilizing new hardware energy performance counters, use of accelerators for error recovery from sub-safe voltage operation, and approximate computing through annotated code. Furthermore, the project team established and investigated the theoretical limits of energy savings at the device, circuit, architecture, runtime, and programming model levels of the computing stack, as well as quantify the actual energy savings achieved by the ParaDIME approach for the complete computing stack.
