Resilience In Distributed Systems

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2004

A case for resource-conscious out-of-order processors: towards kilo-instruction in-flight processors

ACM SIGARCH Computer Architecture News

A. Cristal, J. F. Martínez, J. Llosa, and M. Valero
Future ILP processors

International Journal of High Performance Computing and Networking

A. Cristal, J. Llosa, M. Valero, and D. Ortega
A partitioned instruction queue to reduce instruction wakeup energy

International Journal of High Performance Computing and Networking

M. A. Ramírez, A. Cristal, M. Valero, A. Veidenbaum, and L. A. Villa

2003

Ephemeral Registers with Multicheckpointing

A. Cristal, J. F. Martínez, J. Llosa, and M. Valero
Content Aware Register File Organisation

R. González, A. Cristal, D. Ortega, and M. Valero
A Case for Resource-conscious Out-of-order Processors

A. Cristal, J. F. Martínez, J. Llosa, and M. Valero
Out-of-Order Commit Processors

A. Cristal, J. F. Martínez, D. Ortega, J. Llosa, and M. Valero
Arquitecturas Basadas en el Contenido

XIV Jornadas de Paralelismo

R. González, A. Cristal, D. Ortega, and M. Valero
Optimal Use of Registers in Aggressive Superscalar Processors

XIV Jornadas de Paralelismo

A. Cristal, J. F. Martínez, J. Llosa, and M. Valero
A Simple Low-Energy Instruction Wakeup Mechanism

5th International Symposium on High Performance Computing (ISHPC-V)

M. A. Ramírez, A. Cristal, A. Veidenbaum, L. A. Villa, and M. Valero
Kilo-instruction Processors

5th International Symposium on High Performance Computing (ISHPC-V)

A. Cristal, D. Ortega, J. Llosa, and M. Valero
A Case for Resource Conscious Out-of-Order Processor

MEDEA Workshop MEmory performance: DEaling with Applications , systems and architecture (MEDEA 2003)

A. Cristal, J. F. Martínez, J. Llosa, and M. Valero
A Low-Power-Instruction-Queue Wakeup Mechanism

XIV Jornadas de Paralelismo

M. A. Ramírez, A. Cristal, A. Veidenbaum, L. A. Villa, and M. Valero
A Case for Resource-conscious Out-of-order Processors

Computer Architecture Letters

A. Cristal, J. F. Martínez, J. Llosa, and M. Valero

2002

Large Virtual ROBs by Processor Checkpointing

A. Cristal, M. Valero, A. González, and J. Llosa
ROBs Virtuales utilizando checkpoints

XIII Jornadas de Paralelismo

A. Cristal, and M. Valero

1997

Un simulador de un procesador similar al MIPS R10000

A. Cristal

1996

Síntesis de Redes de Petri

A. Cristal

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