SOFTWARE & HARDWARE

Licensable technology created by BSC

Showing 121 - 140 results of 153

SafeLS (Safe Lockstep): The Safe Lockstep (SafeLS for short) unit is a RISC-V open-source lockstep core based on Frontgrade Gaisler AB's NOEL-V core for the space domain, as well as its integration in the SELENE SoC that provides a complete microcontroller synthesizable on FPGA successfully assessed against space, automotive, and railway safety-critical applications in the past.

The Safe Statistics Unit (SafeSU for short) is an RTL IP that implements several mechanisms for multicore timing interference verification, validation, and monitoring. It has been integrated into commercial space-graded RISC-V and SparcV8 MPSoCs.

The Safe Traffic Injector (SafeTI for short) unit acts as an AHB or AXI4 Manager IP connected to the main AMBA bus. It functions as a core with limited capabilities, only generating transactions to the bus by reading and writing to memory address and controlled via APB registers. The injector works along with the multi-core setup instantiated on the platform and other peripherals and monitoring units. In order to generate traffic to the bus, the module must be first programmed with a series of descriptors describing the traffic pattern to be injected. Then, once the SafeTI module is configured and enabled, it performs a set of AMBA transactions based on the programmed data descriptors into a predefined memory address range.

We note that many emerging AI-based functionalities are intrinsically stochastic (e.g., camera-based object detection), and hence, their correctness must be judged semantically, with room for variations across correct outcomes (e.g., confidence must be above a given threshold).
Building on this observation, we propose strategies to create DMR and TMR implementations of AI-based functionalities that bring not only fault tolerance against random hardware faults, but also against AI model inaccuracies. Those strategies, which can be realized with software-only means and ported to virtually any computing platform, build on input data modifications affecting the inference computations, but not the expected semantic output (e.g., introducing some limited random noise in the input data). Moreover, we have implemented a tool for image and video processing aimed at facilitating the reproducibility of our evaluation results, and enabling others to use it and conduct further research on input transformations.
Software-only smart AI diverse redundancy. This solutions enables the execution of AI models redundantly and with diversity to mitigate the likelihood of a single fault, whether it is a random hardware fault or an AI model misprediction, to cause a failure. This solution is relevant for the use of AI software in the most safety-critical systems in, for instance, autonomous driving and unmanned vehicles. Ensures saafe AI integrtion in automotive, space and railway systems. It uniquely certifies solutions, addressing explainability,, supervision, traceability, and real-time compliance. 

Saiph is a Domain Specific Language developed at BSC for simulating physical phenomena modeled by Partial Differential Equations systems designed for users  that are not experts in numerical methods neither programming for supercomputers

Solderpad Hardware License (Version 2.1)

Sargantana constitutes the third generation of Lagarto processors, the first open-source chips developed in Spain, within the framework of the DRAC project (Designing RISC-V-based Accelerators for next generation Computers) and is one of the most academically advanced open-source chips in Europe. The new Sargantana presents better performance than its two predecessors and is the first processor in the Lagarto family to break the gigahertz barrier in working frquency.

It is a 1 GHz+ In-Order RISC-V Processor with SIMD Vector Extensions in 22nm FD-SOI (RV64GV).

Solderpad Hardware License (Version 2.1)

SAURIA (Systolic Array tensor Unit for aRtificial Intelligence Acceleration) is a CNN (Convolutional Neural Network) accelerator that efficiently executes heavy computations needed for neural network algorithms, such as 2D convolutions and general matrix-matrix multiplications. The accelerator is meant to be loosely coupled to a host CPU, which must manage its local memories (fetch input data and extract results) and configure its execution through a memory-mapped interface. Once the host has prepared and started the execution, SAURIA will perform the convolution independently, and raise an interrupt upon full completion.
Scanflow, developed by Lenovo and BSC, is a scalable library designed for managing end-to-end machine learning (ML) workflows. Its primary function is to streamline the deployment, supervision, and debugging of ML processes. Leveraging Docker containers, Scanflow ensures easy deployment, portability, and reproducibility of ML workflows, while also enabling scalability through integration with cluster orchestrators. 

Scord is an open-source data scheduling service that orchestrates asynchronous data transfers between different storage backends in an HPC cluster.

GPL License (Version 3.0)

Wind resource assesment and design for wind farm operators

Tool set for exploration, visualization and query of ontologies.

servIoTicy is a scalable IoT stream processing platform. It provides multi-tenant data stream processing capabilities, a REST API, data analytics, advanced queries and multi-protocol support in a combination of advanced data-centric services.

Software that analyzes gene expression data available in public databases such as GEO and ArrayExpress to study similarities between diseases by analyzing women and men separately. This software identifies first the sex of the samples based on the expression levels of genes on the Y chromosome, and then performs data normalization, differential expression, functional enrichment and study of similarities between diseases based on the differential expression profiles and the enriched biological processes. Software results are in turn made available for use by the scientific community.

GPL (Version 3.0)

The Siesta code is a highly efficient and scalable software package used for performing electronic structure calculations and ab initio molecular dynamics simulations of molecules and solids. It is based on density functional theory (DFT) and employs low-scaling algorithms, which enable the study of very large systems at the atomic scale. BSC has significantly contributed to the efficient parallelization of Siesta, as well as the implementation of low-scaling solvers, enhancing its performance and usability on high-performance computing platforms.

SOD2D: Spectral high-Order coDe 2 solve partial Differential equations

This code implements a numerical solution for the equations governing compressible and incompressible fluid flow in three dimensions. The code is based on the spectral element method (SEM) and is designed to be used for scale-resolving simulations (LES and DNS).

The Sonar project defines a set of runtime libraries which instrument parallel programming models through the ovni instrumentation library.

GPL License (Version 3.0)

SUNSET (SUbseasoNal to decadal climate forecast post-processing and asSEssmenT suite) is a collaborative R-based tool developed in-house at BSC-ES that aims to provide climate services for sub-seasonal, seasonal and decadal climate forecast time scales. The tool post-processes climate forecast outputs by applying state-of-the-art methodologies to tailor climate products for each application and sector (e.g.: agriculture, energy, water management, or health).
Generation of cancer synthetic genomes using NEAT.
TADIL (Task-Agnostic Domain-Incremental Learning) is a joint BSC/Lenovo effort in the autonomous driving domain that incorporates Continual Learning concepts to adaptively process data from diverse urban and rural driving environments. TADIL's main objective is to create a domain-incremental detector capable of handling various real-world scenarios like changing weather, time of the day, and locations.

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