ProNoC

Uncores RISC-V BSC Group: Computer Sciences Hardware
ProNoC presents an FPGA-optimized Network-On-Chip RTL code with ASIC-based NoC functionalities. ProNoC offers a fully parametrizable design written in SystemVerilog. The NoC is configurable with many state-of-art features such as virtual channels, virtual networks, hard-built-in QoS, multicast, multihop bypass, different routing algorithms, and network typologies.
Software Author: 
Alireza Monemi, Miquel Moreto
License: 

Solderpad Hardware License (Version 2.1)

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The ProNoC RTL code can be used as a crosspoint IP core in any multicore system while offering a low-cost and low-communication latency interconnection network.