Publications

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2006

Performance Analysis of Sequence Alignment Applications

IISWC, IEEE Internacional Symposium on Workload Characterization

F. Sánchez, E. Salami, A. Ramirez, and M. Valero
Performance, Power Efficiency and Scalability of Asymmetric Cluster Chip Multiprocessors

T. Morad, U. Weiser, A. Kolodny, M. Valero, and E. Ayguade
A DRAM/SRAM Memory Scheme for Fast Packet Buffers

J. Vidal, M. March, L.. Cerdá, J. Corbal, and M. Valero
Predictable Performance in SMT processors: Synergy Between the OS and SMTs

IEEE Transactions on Computers

F. Cazorla, P. Knijnenburg, R. Sakellariou, E. Fernández, A. Ramirez, and M. Valero
Analysis of Simultaneous Multithreading Implementations in Current High-Performance Processors

K. Kedzierski, F. Cazorla, and M. Valero
Performance Impact of the Grid Middleware

Engineering the Grid: Status and Perspective

D. Carrera, J. Guitart, V. Beltran, J. Torres, and E. Ayguade
Scheduling Connections using System-Level Thread Priorities in Web Applications

XVII Jornadas de Paralelismo

J. Alonso, J. Guitart, and J. Torres
Monitoring and analyzing a Grid Middleware Node

R. Nou, F. Julià, D. Carrera, K. Hogan, J. J. Caubet, J. Labarta, and J. Torres
Experiences with Simulations - A Light and Fast Model for Secure Web Applications

12th International Conference on Parallel and Distributed Systems (ICPADS'06)

R. Nou, J. Guitart, D. Carrera, and J. Torres
Simulating and Modeling Secure Web Applications

Lecture Notes on Computer Science (LNCS), 6th International Conference on Computational Science (ICCS'06)

R. Nou, J. Guitart, and J. Torres

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