ShadowHTM: Using a dual-bitcell L1 Data Cache to Improve Hardware Transactional Memory Performance

Miscellaneous 2010

Authors: Armejach, Adrià / Seyedi, Azam / Gil, Rubén Titos / Hur, Ibrahim / Unsal, Osman / Cristal, Adrián / Valero, Mateo

Number: UPC-DAC-RR-2010-49