The project, involving BSC, has addressed the technology gaps to achieve high performance and high energy efficiency on future supercomputers
The EU-funded TEXTAROSSA project successfully ended after three years of collaboration toward designing and developing an efficient supercomputer system toward exascale. TEXTAROSSA addressed technological gaps to high performance and high energy efficiency on near-future exascale computing systems to push computing power to the next level. The project’s innovative co-design approach ensured results could be employed in key applications in air pollution modelling, quantum and brain simulations, advanced math and physics, and detection of risk factors in cities.
BSC research focused on improving the management of parallel applications, introducing the scheduler in the hardware. Scheduling is moved into the hardware by the fast task scheduler component, which was integrated within the RISC-V processors. Specifically, the BSC-developed 30-core RISC-V system demonstrated how hardware Task Scheduling can provide competitive performance with a high number of cores and, incorporates hardware and software optimizations that make this solution even more scalable.
BSC brought its expertise in task-based runtime systems adapting BSC technology OmpSs-2@FPGA to the TEXTAROSA ecosystem. Using OmpSs-2@FPGA and Picos on FPGA clusters provided an innovative approach that not only enhances performance but also streamlines programming productivity by eliminating specification errors related to data communications.
Xavier Martorell,Parallel Programming Models Group Manager from the BSC, highlighted the significant enhancement in task scheduling within multicore systems achieved during the project: “Integrating the hardware Picos scheduler within the TEXTAROSSA environment has vastly improved the management of tasks in task-based applications. This integration results in a remarkable reduction of scheduling overheads, reaching two orders of magnitude better than software-based approaches. Fine granularity tasks, as short as 10K cycles, can now be efficiently managed, marking a substantial leap in performance optimization.”
More information on BSC project results are openly available:
Scientific publications:
- Lucas Morais et al: Enabling HW-Based Task Scheduling in Large Multicore Architectures, Transactions on Computers, vol 73, no I, January 2024, link to the repository (Open access)
- Juan Miguel de Haro Ruiz, Carlos Ávarez Martínez, Daniel Jiménez-González, Xavier Martorell: Enabling high-level parallel programming on multi-FPGA clusters, HEART’24, Porto, Portugal, June 19-21, 2024, pending
Github repository:
- OmpSs@FPGA over IDV-E: Work offloading from a CPU host computer to a standalone FPGA (PCIe), transparent to the programmer.
About Textarossa
TEXTAROSSA (Towards EXtreme scale Technologies and AcceleRatOrS for HW/SW Supercomputing Applications for exascale) was selected for funding by the European High Performance Computing (EuroHPC) Joint Undertaking within the EuroHPC-01-2019/Extreme scale computing and data driven technologies call, sub-topic a), as one of the key programs that will innovate and widen the overall efficiency of High Performance Computing (HPC) systems. The three-year project, led by ENEA (Italy), started on April 1st, 2021 and aggregates 17 institutions and companies located in 5 European countries: CINI (an Italian consortium grouping together three leading universities, Politecnico di Milano, Università degli studi di Torino, and Università di Pisa), FRAUNHOFER (Germany), INRIA (France), ATOS (France), E4 Computer Engineering (Italy), BSC (Spain), PSNC (Poland), INFN (Italy), CNR (Italy), In Quattro (Italy), Université de Bordeaux (France), CINECA (Italy) and Universitat Politècnica de Catalunya (UPC).