ExaNoDe selects underlying technology components

The European project ExaNoDe (European Exascale Processor Memory Node Design) will develop a compute element aimed towards Exascale computing. ExaNoDe will build a node-level prototype with technologies that exhibit a significant potential for Exascale computing. The building blocks are heterogeneous compute elements (ARM-v8 low-power processors and FPGAs), 3D active interposers for compute density and UNIMEM, an advanced memory scheme for low-latency, high-bandwidth memory access. ExaNoDe will use a commercially available ARM-v8 based computing architecture. CEA-Leti has developed a state-of-the-art silicon interposer which will be used in the ExaNoDe project. This interposer exploits CEA’s integration expertise, forming the basis for high-performance devices with advanced communication capabilities.

ExaNoDe is not only driven by innovative technologies. It will develop a complete software stack for High Performance Computing (HPC), including novel virtualization approaches based on the Linux KVM hypervisor and European programming models such as GPI-2, OmpSs and OpenStream. ExaNoDe will initially utilize emulated hardware and representative HPC applications to evaluate performance at the node level.

Denis Dutoit, project coordinator for ExaNoDe and strategic marketing manager for technologies and solutions for advanced computing at CEA-Leti, notes: “Affordability and power consumption are the main hurdles for an Exascale-class compute node. In the ExaNoDe project, we will demonstrate that the combination of core technologies, i.e. the integration of a 3D active interposer; the use of low-power ARM cores; and a global address space, will make available European technology satisfying the requirements of Exascale HPC.”

The ExaNoDe project is part of a wider group of EU funded projects as part of a strategic vision for economical, low-power approaches. Together with ExaNeSt, EcoSCALE and Mont-Blanc, which are also funded from the EU framework program for research and innovation Horizon 2020, ExaNoDe will use an ARM-based architecture as a major component of its compute nodes. Around € 8 million in funding has been earmarked for ExaNoDe until 2018.

Thirteen partners from six European countries are involved in the ExaNoDe project: CEA[1] (FR), ARM[2] (UK), the University of Manchester[3] (UK), ETH[4] Zürich (CH), CNRS[5] (FR), Kalray (FR), FORTH[6] (EL), Virtual Open Systems (FR), Fraunhofer[7] (DE), Barcelona Supercomputing Center (ES), Forschungszentrum Jülich (DE), ATOS[8] (F) and scapos (DE).

CEA, ARM and ETH Zürich will deploy their knowledge of silicon-level power-management techniques, chiplet and nanotechnology design. CNRS will support CEA in the assembly and packaging of devices. Kalray will provide its expertise in commercialisation and product delivery for interposer based compute elements. FORTH will contribute its expertise in device-to-PCB integration and in the implementation of the UNIMEM memory scheme, firmware and operating systems. Virtual Open Systems will work with FORTH on virtualization and operating systems. Fraunhofer, the Barcelona Supercomputing Center and Forschungszentrum Jülich will enable the software stack. ATOS will provide HPC end-user requirements ensuring that all the technology is appropriate for deployment and integration. scapos will ensure that the consortium works together and delivers the vision of the ExaNoDe project.

About ExaNoDe:

ExaNoDe will investigate, develop, integrate and pilot (using a hardware-emulated interconnect) the building blocks for a highly efficient, highly integrated, multi-way, high-performance, heterogeneous compute element aimed towards Exascale computing. It will build on multiple European initiatives for scalable computing, utilizing a low-power architecture and advanced nanotechnologies.

http://exanode.eu