Publications

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2008

Memory Management on Chip-MultiProcessors with on-chip Memories

Workshop on the Interaction between Operating Systems and Computer Architecture (WIOSCA'08)

I. Gelado, A. Ramirez, N. Navarro, and C. Villavieja
Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications

Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS'08)

S. Isaza, F. Sánchez, G. N. Gaydadjiev, A. Ramirez, and M. Valero
A Dynamic Scheduler for Balancing HPC Applications

C. Boneti, R. Gioiosa, F. Cazorla, and M. Valero
Software-Controlled Priority Characterization of POWER5 Processor

International Symposium on Computer Architecture (ISCA)

C. Boneti, F. Cazorla, R. Gioiosa, C-Y. Cher, A. Buyuktosunoglu, and M. Valero
Balancing HPC Applications Through Smart Allocation of Resources in MT Processors

C. Boneti, F. Cazorla, R. Gioiosa, J. Corbalán, J. Labarta, and M. Valero
Vectorized AES Core for high-throughput secure environments

M. Pericas, R. Chaves, G. N. Gaydadjiev, M. Valero, and S. Vassiliadis
Virtual Private Machines: Hardware/Software Interactions in the Multicore Era

K. J. Nesbit, M. Moreto, F. Cazorla, A. Ramirez, M. Valero, and J. E. Smith
Reducing wasted resources to help achieve green data centers

J. Torres, D. Carrera, K. Hogan, R. Gavaldà, V. Beltran, and N. Poggi
Managing SLAs of heterogeneous workloads using dynamic application placement

D. Carrera, M. Steinder, I. Whalley, J. Torres, and E. Ayguade
Utility-based Placement of Dynamic Web Applications with Fairness Goals

D. Carrera, M. Steinder, I. Whalley, J. Torres, and E. Ayguade

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