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2007

MLP-aware dynamic cache partitioning

International Conference on Parallel Architectures and Compilation Techniques (PACT)

M. Moreto, F. Cazorla, A. Ramirez, and M. Valero
Explaining Dynamic Cache Partitioning Speed Ups

IEEE Computer Architecture Letters

M. Moreto, F. Cazorla, A. Ramirez, and M. Valero
Online Prediction of Applications Cache Utility

International Symposium on Systems, Architectures, MOdeling and Simulation (SAMOS)

M. Moreto, F. Cazorla, A. Ramirez, and M. Valero
Core to Memory Interconnection Implications for Forthcoming On-Chip Multiprocessors

1st Workshop on Chip Multiprocessor Memory Systems and Interconnects (CMP-MSI 2007)

C. Acosta, F. Cazorla, A. Ramirez, and M. Valero
Performance Impact of the Interconnection Network on MareNostrum Applications

1st Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip (INA-OCMC 2007)

A. Ramirez, O. Prat, J. Labarta, and M. Valero
Performance Impact of Unaligned memory Operations in SIMD Extensions for Video CODEC Applications

IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2007)

M. Álvarez, E. Salami, J. Labarta, and M. Valero
Dynamic Resource Provisioning for Self-Adaptive Heterogeneous Workloads in SMP Hosting Platforms

2nd International Conference on eBusiness (ICE-B 2007) (Short Paper)

R. Nou, F. Julià, J. Guitart, and J. Torres
Designing an Overload Control Strategy for Secure e-Commerce Applications

Computer Networks

J. Guitart, D. Carrera, V. Beltran, J. Torres, and E. Ayguade
Enforcing Service Level Agreements using an Economically Enhanced Resource Manager

1st Workshop on Economic Models and Algorithms for Grid Systems (EMAGS 2007)

M. Macías, G. Smith, O. Rana, J. Guitart, and J. Torres
Extended Resource Management Using Client Classification and Economic Enhancements

17th eChallenges e-2007 Conference & Exhibition (e-2007)

T. Püschel, N. Borissov, D. Neumann, M. Macías, J. Guitart, and J. Torres

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