The parMERASA project’s final workshop, held at BSC, brought together around 40 project partners and industry leaders.
On 23 September, representatives of leading European companies in the safety critical domain, including the automation, automotive and avionics sectors, gathered in Barcelona to find out about parMERASA’s cutting-edge solutions for multi-core systems which improve performance while maintaining safety levels. The parMERASA project’s final workshop, held at Barcelona Supercomputing Center, brought together around 40 project partners and industry leaders, including Airbus, Saab Avionics, Robert Bosch, Infineon, Daimler, Indra, Bauer and Siemens, from eight different countries.
The project results showcased during the event included a software-engineering approach to facilitate the shift from sequential to parallel program execution of safety critical real-time systems, as well as verification and profiling tools to support parallelisation, which are fundamental in ensuring that the systems work properly. Project partners also presented the recommendations they have produced for automotive and avionics standards, with the aim of enabling parallel execution. Finally, they presented the project’s many-core processor architecture, designed to facilitate the timing analysis of parallel applications while exploiting the performance opportunities provided by parallel execution. parMERASA technology has been demonstrated on three industrial use cases: an avionics collision avoidance system, an engine management system and a construction machine control system.
parMERASA (Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability) was a three-year FP7 project co-financed by the European Commission. The main aim was to demonstrate the use of multi-core processors in real-time systems. To meet this goal, the project had to overcome the problems of existing timing analysis approaches, which only cover sequential program execution (where instructions are carried out one after another on a single core processor – in sequence – and only one instruction may be carried out at any moment in time).
The project was coordinated by the University of Augsburg, with the participation of the following partners:
- Barcelona Supercomputing Center, Spain
- Université Paul Sabatier - Institut de Recherche en Informatique de Toulouse, France
- Technical University of Dortmund - Department of Electrical Engineering, Germany
- Rapita Systems Ltd., United Kingdom
- Honeywell International s.r.o., Czech Republic
- BAUER Maschinen GmbH, Germany
- DENSO AUTOMOTIVE Deutschland GmbH, Germany
