Resilience In Distributed Systems

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2006

Chip Multiprocessors with Implicit Transactions

2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06)

E. Vallejo, M. Galluzzi, A. Cristal, F. Vallejo, R. Beivide, P. Stenström, J. E. Smith, and M. Valero
Boosting ILP{&}TLP with the Flexible Multi-Core (FMC)

2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06)

M. Pericas, A. Cristal, R. González, F. Cazorla, D. A. Jiménez, and M. Valero
Kilo-Instruction Processors, RunAhead and Prefetch

ACM International Conference on Computing Frontiers (CF 2006)

T. Ramírez, A. Cristal, O. J. Santana, A. Pajuelo, and M. Valero
A decoupled KILO-instruction processor

The 12th International Symposium on High-Performance Computer Architecture (HPCA-12)

M. Pericas, A. Cristal, R. González, D. Jiménez, and M. Valero

2005

A New Pointer-based Instruction Queue Design and Its Power-Performance Evaluation

IEEE International Conference on Computer Design (ICCD-2005)

M. A. Ramírez, A. Cristal, M. Valero, A. Veidenbaum, and L. A. Villa
Arquitectura Simétrica Clusterizada basada en el Contenido

XVI Jornadas de Paralelismo

R. González, A. Cristal, M. Pericas, A. Veidenbaum, and M. Valero
Towards the Loop Processor Architecture

XVI Jornadas de Paralelismo

A. García, P. Medina, E. Fernández, O. J. Santana, A. Cristal, and M. Valero
KIMP: Multicheckpointing Multiprocessors

XVI Jornadas de Paralelismo

E. Vallejo, M. Galluzzi, A. Cristal, F. Vallejo, R. Beivide, P. Stenström, J. E. Smith, and M. Valero
Exploiting Execution Locality with a Decoupled Kilo-Instruction Processor

6th International Symposium on High Performance Computing (ISHPC-VI 2005)

M. Pericas, A. Cristal, R. González, D. A. Jiménez, and M. Valero
Decoupled State-Execute Architecture

6th International Symposium on High Performance Computing (ISHPC-VI 2005)

M. Pericas, A. Cristal, R. González, and M. Valero
Eficacia vs. Eficiencia: Una decisión de diseño en Runahead

XVI Jornadas de Paralelismo

T. Ramírez, A. Cristal, A. Pajuelo, O. J. Santana, and M. Valero
Implementing Kilo-Instruction Multiprocessors

International Conference on Pervasive Services (ICPS 2005)

E. Vallejo, M. Galluzzi, A. Cristal, F. Vallejo, R. Beivide, P. Stenström, J. E. Smith, and M. Valero
Overcoming the Memor Wall with D-KIPs

2005 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-2005)

M. Pericas, R. González, A. Cristal, and M. Valero
Different approaches using Kilo-instruction Processors

2005 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-2005)

T. Ramírez, M. Galluzzi, A. Cristal, and M. Valero
An asymetric Clustered Processor Based on Value Content

The 19th ACM International Conference on Supercomputing (ICS'05)

R. González, A. Cristal, M. Pericas, M. Valero, and A. Veidenbaum
Kilo-instruction Processors: Overcoming the Memory Wall

IEEE Micro

A. Cristal, O. J. Santana, F. Cazorla, M. Galluzzi, T. Ramírez, M. Pericas, and M. Valero

2004

Banked Front-End Register File

M. Pericas, R. González, A. Cristal, A. Veidenbaum, and M. Valero
A clustered Processor based on Content-Aware Register File

R. González, A. Cristal, A. Veidenbaum, M. Pericas, and M. Valero
INSTRUCTION WAKEUP MECHANISM: Power and Timing Evaluation

CIC,s Research and Computing Science

M. A. Ramírez, A. Cristal, L. A. Villa, A. Veidenbaum, and M. Valero
An Optimized Front-End Physical Register File with Banking and Writeback Filtering

Workshop on Power-Aware Computer Systems (PACS'04)

M. Pericas, R. González, A. Cristal, A. Veidenbaum, and M. Valero
Maintaining Thousands of In-Flight Instructions

10th International Euro-Par 2004 Conference

A. Cristal, O. J. Santana, and M. Valero
A Content Aware Integer Register File Organization

International Symposium on Computer Architecture (ISCA 2004)

R. González, A. Cristal, D. Ortega, A. Veidenbaum, and M. Valero
Scalable Distributed Register File

5th Workshop on Complexity-Effective Design

R. González, A. Cristal, M. Pericas, A. Veidenbaum, and M. Valero
Evaluating Kilo-instruction Multiprocessors

3rd Workshop on Memory Performance Issues (WMPI-2004)

M. Galluzzi, V. Puente, A. Cristal, R. Beivide, J. A. G. Monasterio, and M. Valero
A Comprehensive Description of Kilo-Instruction Processors

5o Congreso Nacional de Computación

A. Cristal, O. J. Santana, and M. Valero
A first glance at Kilo-instruction based multiprocessors

International Conference on Computing Frontiers 2004 (CF'04)

M. Galluzzi, V. Puente, A. Cristal, R. Beivide, J. A. G. Monasterio, and M. Valero
Introducing Kilo-instruction Multiprocessors

XV Jornadas de Paralelismo

M. Galluzzi, V. Puente, O. J. Santana, C. Acosta, A. Cristal, R. Beivide, J. A. G. Monasterio, and M. Valero
Out-of-Order Commit Processors

10th International Symposium on High Performance Computer Architecture (HPCA-10)

A. Cristal, D. Ortega, J. Llosa, and M. Valero
Direct Instruction Wakeup for OOO processors

Innovative Architecture for Future Generation High-Performance Processors and System

M. A. Ramírez, A. Cristal, L. A. Villa, A. Veidenbaum, and M. Valero
Toward Kilo-instruction Processors

ACM Transactions on Architecture and Code Optimization

A. Cristal, O. J. Santana, M. Valero, and J. F. Martínez

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