Francisco Javier Cazorla Almeida

2006

• A Novel Evaluation Methodology to Obtain Fair Measurements in Multithreaded Architectures

  J. Vera, F. Cazorla, A. Pajuelo, O. J. Santana, E. Fernández, and M. Valero
• Analysis of Simultaneous Multithreading Implementations in Current High-Performance Processors

  K. Kedzierski, F. Cazorla, and M. Valero
• Looking for novel ways to obtain fair measurements in multithreaded architectures

  J. Vera, F. Cazorla, A. Pajuelo, O. J. Santana, E. Fernández, and M. Valero
• Analysis of multithreading capabilities of current high-performance processors

  K. Kedzierski, F. Cazorla, and M. Valero
• Improving EDF for SMT processors

  C. Boneti, F. Cazorla, and M. Valero
• Predictable Performance in SMT processors: Synergy Between the OS and SMTs

  IEEE Transactions on Computers

  F. Cazorla, P. Knijnenburg, R. Sakellariou, E. Fernández, A. Ramirez, and M. Valero

2005

• Kilo-instruction Processors: Overcoming the Memory Wall

  IEEE Micro

  A. Cristal, O. J. Santana, F. Cazorla, M. Galluzzi, T. Ramírez, M. Pericas, and M. Valero
• Quality of service for Simultaneous Multithreading Processors

  ACACES 2005, Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems

  F. Cazorla, P. Knijnenburg, R. Sakellarious, E. Fernández, A. Ramirez, and M. Valero
• Dynamically Controlled Resource Allocation in SMT

  XVI Jornadas de Paralelismo. Granada

  F. Cazorla, E. Fernández, A. Ramirez, and M. Valero
• Metrics for the Evaluation of SMT Processors Performance

  XVI Jornadas de Paralelismo

  S. Mir, F. Cazorla, A. Ramirez, and M. Valero