Jaume Abella Ferrer

2013

• A Cache Design for Probabilistically Analysable Real-Time Systems

  ACM/IEEE Design, Automation, and Test in Europe (DATE)

  L. Kosmidis, J. Abella, E. Quinones, and F. Cazorla
• DTM: Degraded Test Mode for Fault-Aware Probabilistic Timing Analysis

  25th Euromicro Conference on Real-Time Systems (ECRTS13)

  M. Slijepcevic, L. Kosmidis, J. Abella, E. Quinones, and F. Cazorla
• APPLE: Adaptive Performance-Predictable Low-Energy Caches for Reliable Hybrid Voltage Operation

  50th Annual Design Automation Conference (DAC)

  B. Maric, J. Abella, and M. Valero
• Measurement-Based Probabilistic Timing Analysis: Lessons from an Integrated-Modular Avionics Case Study

  8th IEEE International Symposium on Industrial Embedded Systems (SIES)

  F. Wartel, L. Kosmidis, C. Lo, B. Triquet, E. Quinones, J. Abella, A. Gogonel, A. Baldovin, E. Mezzetti, L. Cucu-Grosjean, T. Vardanega, and F. Cazorla
• Deconstructing Bus Access Control Policies for Real-Time Multicores

  8th IEEE International Symposium on Industrial Embedded Systems (SIES)

  J. Jalle, J. Abella, E. Quinones, L. Fossati, M. Zulianello, and F. Cazorla
• On the Convergence of Mainstream and Mission Critical Markets

  50th Annual Design Automation Conference (DAC)

  S. Girbal, M. Moreto, A. Grasset, J. Abella, E. Quinones, F. Cazorla, and S. Yehia
• Per-task Energy Accounting in Computing Systems

  In IEEE Computer Architecture Letters (CAL)

  Q. Liu, V. Jimenez, M. Moreto, J. Abella, and F. Cazorla
• Achieving Timing Composability with Probabilistic Timing Analysis

  In IEEE International Symposium on Object-component-service-oriented Real-time distributed computing (ISORC)

  L. Kosmidis, E. Quinones, J. Abella, T. Vardanega, and F. Cazorla
• PROARTIS: Probabilistically Analyzable Real-Time Systems

  ACM Trans. Embed. Comput. Syst.

  F. Cazorla, E. Quinones, T. Vardanega, L. Cucu, B. Triquet, G. Bernat, E. Berger, J. Abella, F. Wartel, M. Houston, L. Santinelli, L. Kosmidis, C. Lo, and D. Maxim
• Efficient Cache Architectures for Reliable Hybrid Voltage Operation Using EDC Codes

  Proceedings of the Conference on Design, Automation and Test in Europe

  B. Maric, J. Abella, and M. Valero