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2015

Speeding up Static Probabilistic Timing Analysis

Architecture of Computing Systems – ARCS 2015

S. Milutinovic, J. Abella, D. Hardy, E. Quinones, I. Puaut, and F. Cazorla

2014

Hybrid Cache Designs for Reliable Hybrid High and Ultra-Low Voltage Operation

ACM Transactions on Design Automation of Electronic Systems (ACM TODAES)

B. Maric, J. Abella, F. Cazorla, and M. Valero
Per-task Energy Accounting in Computing Systems

IEEE Computer Architecture Letters (IEEE CAL)

Q. Liu, V. Jiménez, M. Moreto, J. Abella, F. Cazorla, and M. Valero
Efficient Cache Designs for Probabilistically Analysable Real-Time Systems

IEEE Transactions on Computers

L. Kosmidis, J. Abella, E. Quinones, and F. Cazorla
Timing Verification of Fault-Tolerant Chips for Safety-Critical Applications in Harsh Environments

IEEE Micro

M. Slijepcevic, L. Kosmidis, J. Abella, E. Quinones, and F. Cazorla
A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation for a Space Case Study

35th IEEE Real-Time Systems Symposium

J. Jalle, E. Quinones, J. Abella, L. Fossati, M. Zulianello, and F. Cazorla
RunPar: An Allocation Algorithm for Automotive Applications Exploiting Runnable Parallelism in Multicores

12th International Conference on Hardware/Software Codesign and System Synthesis

M. Panic, S. Kehr, E. Quinones, B. Boeddeker, J. Abella, and F. Cazorla
Parallel Many-Core Avionics Systems

14th International Conference on Embedded Software

M. Panic, E. Quinones, P. Zaykov, C. Hernández, J. Abella, and F. Cazorla
Measurement-Based Probabilistic Timing Analysis and Its Impact on Processor Architecture

17th Euromicro Conference on Digital System Design (DSD)

L. Kosmidis, E. Quinones, J. Abella, T. Vardanega, I. Broster, and F. Cazorla
DReAM: Per-Task DRAM Energy Metering in Multicore Systems

20th International EUROPAR Conference. European Conference on Parallel and Distributed Computing

Q. Liu, M. Moreto, J. Abella, F. Cazorla, and M. Valero

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