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2007

Performance Impact of the Interconnection Network on MareNostrum Applications

1st Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip (INA-OCMC 2007)

A. Ramirez, O. Prat, J. Labarta, and M. Valero

2006

A module based Cell processor simulator

2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06)

F. Cabarcas, A. Rico, D. Ródenas, X. Martorell, A. Ramirez, and E. Ayguade
Reducing Simulation Time

2006 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-06)

M. Moreto, A. Ramirez, and M. Valero
Branch Predictor Guided Instruction Decoding

IEEE Intl. Conference on Parallel Architectures and Compiler Techniques (PACT-2006)

O. J. Santana, A. Falcón, A. Ramirez, and M. Valero
Performance Analysis of Sequence Alignment Applications

IISWC, IEEE Internacional Symposium on Workload Characterization

F. Sánchez, E. Salami, A. Ramirez, and M. Valero
Predictable Performance in SMT processors: Synergy Between the OS and SMTs

IEEE Transactions on Computers

F. Cazorla, P. Knijnenburg, R. Sakellariou, E. Fernández, A. Ramirez, and M. Valero

2005

Complexity-Effectiveness in Multithreading Architectures

In 2005 Advanced Computer Architecture and Compilation for Embedded Systems (ACACES-2005)

C. Acosta, A. Falcón, A. Ramirez, and M. Valero
Quality of service for Simultaneous Multithreading Processors

ACACES 2005, Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems

F. Cazorla, P. Knijnenburg, R. Sakellarious, E. Fernández, A. Ramirez, and M. Valero
A Performance Evaluation of High Definition Digital Video Decoding Using the H.264/AVC Standard

ACACES 2005, Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems

M. Álvarez, E. Salami, A. Ramirez, and M. Valero
Parallel Processing in Sequence Matching

ACACES 2005, Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems

E. Salami, A. Ramirez, F. Sánchez, and M. Valero

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