SORS: Integrating posit arithmetic into a RISC-V core
Objectives
Abstract: The Posit representation, an alternative to the widely used IEEE 754 floating-point standard, offers promising benefits in terms of accuracy and execution efficiency. Nonetheless, posits are still under development, and a core that can run application-level software is needed to study the performance of this novel arithmetic format.
Short Bio: Raul Murillo received a BSc Degree in Computer Science and a BSc Degree in Mathematics in 2019 from the Complutense University of Madrid (UCM), where he also received his MSc Degree in Computer Science in 2021. Since 2022, he is a Teaching Assistant of Computer Science with the Department of Computer Computer Architecture and Automation at UCM. Currently, he is pursuing a Ph.D. in Computer Engineering at UCM. He has performed research stays at Politecnico di Milano, Milan. His main research areas include computer arithmetic, computer architecture, approximate computing, and deep neural networks.
Speakers
Speaker: Raúl Murillo, is pursuing a Ph.D. in Computer Engineering at UCM
Host: Miquel Moretó, High Performance Domain-Specific Architectures Associated Researcher, CS, BSC